mips16 reg_or_0_operand doesn't allow zero

Gavin Romig-Koch gavin@cygnus.com
Thu Jan 21 12:02:00 GMT 1999


The existing reg_or_0_operand predicate does not accept 0 for mips16,
which in general is the correct thing to do.  But, for mips16 div
traps, zero's are ok, and we can get better code for mips16 div_trap
tests if we allow them.


	* config/mips/mips.c (true_reg_or_0_operand) : New function.
	* config/mips/mips.h (PREDICATE_CODES): Add true_reg_or_0_operand.
	* config/mips/mips.md (div_trap,div_trap_normal,div_trap_mips16): 
	Use true_reg_or_0_operand for div_trap.
	

Index: gcc/config/mips/mips.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/mips/mips.c,v
retrieving revision 1.47
diff -c -r1.47 mips.c
*** gcc/config/mips/mips.c	1998/12/23 07:09:00	1.47
--- gcc/config/mips/mips.c	1999/01/20 17:47:26
***************
*** 543,548 ****
--- 543,575 ----
    return 0;
  }
  
+ /* Return truth value of whether OP is a register or the constant 0,
+    even in mips16 mode. */
+ 
+ int
+ true_reg_or_0_operand (op, mode)
+      rtx op;
+      enum machine_mode mode;
+ {
+   switch (GET_CODE (op))
+     {
+     case CONST_INT:
+       return INTVAL (op) == 0;
+ 
+     case CONST_DOUBLE:
+       return op == CONST0_RTX (mode);
+ 
+     case REG:
+     case SUBREG:
+       return register_operand (op, mode);
+ 
+     default:
+       break;
+     }
+ 
+   return 0;
+ }
+ 
  /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant.  */
  
  int
Index: gcc/config/mips/mips.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/mips/mips.h,v
retrieving revision 1.44
diff -c -r1.44 mips.h
*** gcc/config/mips/mips.h	1999/01/13 00:02:31	1.44
--- gcc/config/mips/mips.h	1999/01/20 17:47:34
***************
*** 3698,3703 ****
--- 3698,3704 ----
    {"arith_operand",		{ REG, CONST_INT, SUBREG }},		\
    {"arith32_operand",		{ REG, CONST_INT, SUBREG }},		\
    {"reg_or_0_operand",		{ REG, CONST_INT, SUBREG }},		\
+   {"true_reg_or_0_operand",	{ REG, CONST_INT, SUBREG }},		\
    {"small_int",			{ CONST_INT }},				\
    {"large_int",			{ CONST_INT }},				\
    {"mips_const_double_ok",	{ CONST_DOUBLE }},			\
Index: gcc/config/mips/mips.md
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/mips/mips.md,v
retrieving revision 1.48
diff -c -r1.48 mips.md
*** gcc/config/mips/mips.md	1999/01/18 09:10:44	1.48
--- gcc/config/mips/mips.md	1999/01/20 17:47:41
***************
*** 2414,2420 ****
  
  (define_expand "div_trap"
    [(trap_if (eq (match_operand 0 "register_operand" "d")
! 		(match_operand 1 "reg_or_0_operand" "dJ"))
              (match_operand 2 "immediate_operand" ""))]
    ""
    "
--- 2414,2420 ----
  
  (define_expand "div_trap"
    [(trap_if (eq (match_operand 0 "register_operand" "d")
! 		(match_operand 1 "true_reg_or_0_operand" "dJ"))
              (match_operand 2 "immediate_operand" ""))]
    ""
    "
***************
*** 2428,2434 ****
  
  (define_insn "div_trap_normal"
    [(trap_if (eq (match_operand 0 "register_operand" "d")
! 		(match_operand 1 "reg_or_0_operand" "dJ"))
              (match_operand 2 "immediate_operand" ""))]
    "!TARGET_MIPS16"
    "*
--- 2428,2434 ----
  
  (define_insn "div_trap_normal"
    [(trap_if (eq (match_operand 0 "register_operand" "d")
! 		(match_operand 1 "true_reg_or_0_operand" "dJ"))
              (match_operand 2 "immediate_operand" ""))]
    "!TARGET_MIPS16"
    "*
***************
*** 2471,2477 ****
  
  (define_insn "div_trap_mips16"
    [(trap_if (eq (match_operand 0 "register_operand" "d")
! 		(match_operand 1 "reg_or_0_operand" "dJ"))
              (match_operand 2 "immediate_operand" ""))
     (clobber (reg:SI 24))]
    "TARGET_MIPS16"
--- 2471,2477 ----
  
  (define_insn "div_trap_mips16"
    [(trap_if (eq (match_operand 0 "register_operand" "d")
! 		(match_operand 1 "true_reg_or_0_operand" "dJ"))
              (match_operand 2 "immediate_operand" ""))
     (clobber (reg:SI 24))]
    "TARGET_MIPS16"



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