__builtin_constant_p, again

Richard Henderson rth@cygnus.com
Thu Jan 21 07:15:00 GMT 1999


So Jeff gives me this HPPA __builtin_constant_p problem, where the
CONSTANT_P_RTX doesn't want to go away after CSE.  And I note that
it's got weird REG_EQUAL and (high (const (constant_p_rtx))) bits
going on, and I think to myself ``This whole smuggling C_P_RTX
inside a CONST is all just a horrid mistake isn't it.  I should just
give up on this idea of Kenner's and go back to what I had before.''

And so I did.  Given that I have egg on my face twice over for this,
I decided that the only way to redeem myself was to make sure it 
works everywhere. 

I am somewhat amazed to report that a three line modification to 
immediate_operand gets __b_c_p to work on EVERY target except alpha
and c4x.  Oh, and i860, but that one doesn't work at all for reasons
I couldn't quite grok.

I am also somewhat amazed to report that aside from i860 and a few
extremely minor tweeks, every port builds and is able to generate
code for execute/bcp-1.c that does not look entirely incorrect.


r~

PS.  m88k was the worst tweek offender -- there's no listed maintainer,
but if anyone feels responsible for m88k block move patterns, please
look things over.

        * cse.c (fold_rtx): Revert 29 Dec change.
        (cse_insn): Revert 12 Jan change.
        * expr.c (expand_builtin): Don't emit CONST around CONSTANT_P_RTX.
        * regclass.c (reg_scan_mark_refs): Revert 29 Dec change.
        * rtl.def: Likewise.
        * rtl.h (CONSTANT_P): Likewise.

        * expr.c (emit_move_insn): Never try to flush CONSTANT_P_RTX
        to memory.
        * recog.c (immediate_operand): Accept CONSTANT_P_RTX.
        * alpha.c (input_operand): Likewise.
        * c4x.c (const_operand): Likewise.

        * explow.c (allocate_dynamic_stack_space): Use register_operand
        instead of arith_operand, which does not exist.

        * 1750a.h: Fix comment closure.
        * a29k.c (a29k_set_memflags): Fix typo in 19 Jan change.
        * arc.md (one_cmplsi2_set_cc_insn): Fix set mode mismatch.
        * arm.h (TARGET_SWITCHES): Fix typo.
        * i370.md (anon mult and div patterns): Fix set mode mismatch.
        * i860.c (output_delayed_branch): Fix operands to constrain_operands.
        (output_delay_insn): Likewise.
        * m88k.md (anon rotate insns): Fix set mode mismatch.
        (anon BLKmode moves): Commonize and fix set mode mismatches.
        * ns32k.md (udivmoddi[shq]i4_internal): Fix mode mismatch.
        * romp.md (movdf): Fix typo.

Index: cse.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/cse.c,v
retrieving revision 1.60
diff -c -p -d -r1.60 cse.c
*** cse.c	1999/01/19 12:08:25	1.60
--- cse.c	1999/01/21 09:54:13
*************** fold_rtx (x, insn)
*** 4931,4951 ****
    switch (code)
      {
      case CONST:
-       /* If the operand is a CONSTANT_P_RTX, see if what's inside it
- 	 is known to be constant and replace the whole thing with a
- 	 CONST_INT of either zero or one.  Note that this code assumes
- 	 that an insn that recognizes a CONST will also recognize a
- 	 CONST_INT, but that seems to be a safe assumption.  */
-       if (GET_CODE (XEXP (x, 0)) == CONSTANT_P_RTX)
- 	{
- 	  x = equiv_constant (fold_rtx (XEXP (XEXP (x, 0), 0), 0));
- 	  return (x != 0 && (GET_CODE (x) == CONST_INT
- 			     || GET_CODE (x) == CONST_DOUBLE)
- 		  ? const1_rtx : const0_rtx);
- 	}
- 
-       /* ... fall through ... */
- 
      case CONST_INT:
      case CONST_DOUBLE:
      case SYMBOL_REF:
--- 4931,4936 ----
*************** fold_rtx (x, insn)
*** 5865,5870 ****
--- 5850,5861 ----
  					const_arg1 ? const_arg1 : folded_arg1,
  					const_arg2 ? const_arg2 : XEXP (x, 2));
        break;
+ 
+     case 'x':
+       /* Always eliminate CONSTANT_P_RTX at this stage. */
+       if (code == CONSTANT_P_RTX)
+ 	return (const_arg0 ? const1_rtx : const0_rtx);
+       break;
      }
  
    return new ? new : x;
*************** cse_insn (insn, libcall_insn)
*** 6863,6874 ****
   
        if (src == src_folded)
          src_folded = 0;
- 
-       /* Folds of constant_p_rtx are to be preferred, since we do
- 	 not wish any to live past CSE.  */
-       if (src && GET_CODE (src) == CONST
- 	  && GET_CODE (XEXP (src, 0)) == CONSTANT_P_RTX)
- 	src = 0;
  
        /* At this point, ELT, if non-zero, points to a class of expressions
           equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
--- 6854,6859 ----
Index: explow.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/explow.c,v
retrieving revision 1.22
diff -c -p -d -r1.22 explow.c
*** explow.c	1999/01/19 12:08:28	1.22
--- explow.c	1999/01/21 09:54:13
*************** allocate_dynamic_stack_space (size, targ
*** 1204,1210 ****
  	/* Our optimization works based upon being able to perform a simple
  	   transformation of this RTL into a (set REG REG) so make sure things
  	   did in fact end up in a REG.  */
! 	if (!arith_operand (setjmpless_size, Pmode))
  	  setjmpless_size = force_reg (Pmode, setjmpless_size);
        }
  
--- 1204,1210 ----
  	/* Our optimization works based upon being able to perform a simple
  	   transformation of this RTL into a (set REG REG) so make sure things
  	   did in fact end up in a REG.  */
! 	if (!register_operand (setjmpless_size, Pmode))
  	  setjmpless_size = force_reg (Pmode, setjmpless_size);
        }
  
Index: expr.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/expr.c,v
retrieving revision 1.121
diff -c -p -d -r1.121 expr.c
*** expr.c	1999/01/20 09:15:00	1.121
--- expr.c	1999/01/21 09:54:14
*************** emit_move_insn (x, y)
*** 2497,2503 ****
    if (mode == BLKmode || (GET_MODE (y) != mode && GET_MODE (y) != VOIDmode))
      abort ();
  
!   if (CONSTANT_P (y) && ! LEGITIMATE_CONSTANT_P (y))
      y = force_const_mem (mode, y);
  
    /* If X or Y are memory references, verify that their addresses are valid
--- 2497,2506 ----
    if (mode == BLKmode || (GET_MODE (y) != mode && GET_MODE (y) != VOIDmode))
      abort ();
  
!   /* Never force constant_p_rtx to memory.  */
!   if (GET_CODE (y) == CONSTANT_P_RTX)
!     ;
!   else if (CONSTANT_P (y) && ! LEGITIMATE_CONSTANT_P (y))
      y = force_const_mem (mode, y);
  
    /* If X or Y are memory references, verify that their addresses are valid
*************** expand_builtin (exp, target, subtarget, 
*** 8993,9008 ****
  	      || POINTER_TYPE_P (TREE_TYPE (arg)))
  	    return const0_rtx;
  
! 	  /* Otherwise, emit (const (constant_p_rtx (ARG))) and let CSE
! 	     get a chance to see if it can deduce whether ARG is constant.  */
! 	  /* ??? We always generate the CONST in ptr_mode since that's
! 	     certain to be valid on this machine, then convert it to
! 	     whatever we need.  */
  
  	  tmp = expand_expr (arg, NULL_RTX, VOIDmode, 0);
! 	  tmp = gen_rtx_CONSTANT_P_RTX (ptr_mode, tmp);
! 	  tmp = gen_rtx_CONST (ptr_mode, tmp);
! 	  tmp = convert_to_mode (value_mode, tmp, 0);
  	  return tmp;
  	}
  
--- 8996,9006 ----
  	      || POINTER_TYPE_P (TREE_TYPE (arg)))
  	    return const0_rtx;
  
! 	  /* Otherwise, emit (constant_p_rtx (ARG)) and let CSE get a
! 	     chance to see if it can deduce whether ARG is constant.  */
  
  	  tmp = expand_expr (arg, NULL_RTX, VOIDmode, 0);
! 	  tmp = gen_rtx_CONSTANT_P_RTX (value_mode, tmp);
  	  return tmp;
  	}
  
Index: recog.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/recog.c,v
retrieving revision 1.25
diff -c -p -d -r1.25 recog.c
*** recog.c	1999/01/19 21:55:34	1.25
--- recog.c	1999/01/21 09:54:15
*************** immediate_operand (op, mode)
*** 1088,1093 ****
--- 1088,1099 ----
        && GET_MODE_CLASS (mode) != MODE_PARTIAL_INT)
      return 0;
  
+   /* Accept CONSTANT_P_RTX, since it will be gone by CSE1 and
+      result in 0/1.  It seems a safe assumption that this is
+      in range for everyone.  */
+   if (GET_CODE (op) == CONSTANT_P_RTX)
+     return 1;
+ 
    return (CONSTANT_P (op)
  	  && (GET_MODE (op) == mode || mode == VOIDmode
  	      || GET_MODE (op) == VOIDmode)
Index: regclass.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/regclass.c,v
retrieving revision 1.49
diff -c -p -d -r1.49 regclass.c
*** regclass.c	1999/01/18 06:17:18	1.49
--- regclass.c	1999/01/21 09:54:15
*************** reg_scan_mark_refs (x, insn, note_flag, 
*** 2020,2029 ****
    switch (code)
      {
      case CONST:
-       if (GET_CODE (XEXP (x, 0)) == CONSTANT_P_RTX)
- 	reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn, note_flag, min_regno);
-       return;
- 
      case CONST_INT:
      case CONST_DOUBLE:
      case CC0:
--- 2020,2025 ----
Index: rtl.def
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/rtl.def,v
retrieving revision 1.15
diff -c -p -d -r1.15 rtl.def
*** rtl.def	1998/12/29 11:36:22	1.15
--- rtl.def	1999/01/21 09:54:16
*************** DEF_RTL_EXPR(RANGE_VAR, "range_var", "et
*** 850,859 ****
     0 is the live bitmap.  Operand 1 is the original block number.  */
  DEF_RTL_EXPR(RANGE_LIVE, "range_live", "bi", 'x')
  
! /* A unary `__builtin_constant_p' expression.  This RTL code may only be used
!    as an operand of a CONST.  This pattern is only emitted during RTL
!    generation and then only if optimize > 0.  It is converted by the first
!    CSE pass into the appropriate CONST_INT.  */
  DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
  
  /*
--- 850,858 ----
     0 is the live bitmap.  Operand 1 is the original block number.  */
  DEF_RTL_EXPR(RANGE_LIVE, "range_live", "bi", 'x')
  
! /* A unary `__builtin_constant_p' expression.  These are only emitted
!    during RTL generation, and then only if optimize > 0.  They are
!    eliminated by the first CSE pass. */
  DEF_RTL_EXPR(CONSTANT_P_RTX, "constant_p_rtx", "e", 'x')
  
  /*
Index: rtl.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/rtl.h,v
retrieving revision 1.79
diff -c -p -d -r1.79 rtl.h
*** rtl.h	1999/01/19 21:30:48	1.79
--- rtl.h	1999/01/21 09:54:16
*************** typedef struct rtvec_def{
*** 219,225 ****
  #define CONSTANT_P(X)   \
    (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF		\
     || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE		\
!    || GET_CODE (X) == CONST || GET_CODE (X) == HIGH)
  
  /* General accessor macros for accessing the fields of an rtx.  */
  
--- 219,226 ----
  #define CONSTANT_P(X)   \
    (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF		\
     || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST_DOUBLE		\
!    || GET_CODE (X) == CONST || GET_CODE (X) == HIGH			\
!    || GET_CODE (X) == CONSTANT_P_RTX)
  
  /* General accessor macros for accessing the fields of an rtx.  */
  
Index: config/1750a/1750a.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/1750a/1750a.h,v
retrieving revision 1.9
diff -c -p -d -r1.9 1750a.h
*** 1750a.h	1998/12/16 21:00:30	1.9
--- 1750a.h	1999/01/21 09:54:16
*************** enum reg_class { NO_REGS, R2, R0_1, INDE
*** 732,738 ****
    reg_renumber[REGNO] >= 12 && reg_renumber[REGNO] <= 15)
  
  /* Now macros that check whether X is a register and also,
!    strictly, whether it is in a specified class.
  
  /* 1 if X is an address register  */
  
--- 732,738 ----
    reg_renumber[REGNO] >= 12 && reg_renumber[REGNO] <= 15)
  
  /* Now macros that check whether X is a register and also,
!    strictly, whether it is in a specified class.  */
  
  /* 1 if X is an address register  */
  
Index: config/a29k/a29k.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/a29k/a29k.c,v
retrieving revision 1.4
diff -c -p -d -r1.4 a29k.c
*** a29k.c	1999/01/19 12:08:30	1.4
--- a29k.c	1999/01/21 09:54:16
*************** a29k_set_memflags (insn, ref)
*** 530,536 ****
    /* Note that it is always safe to get these flags, though they won't
       be what we think if REF is not a MEM.  */
    int in_struct_p = MEM_IN_STRUCT_P (ref);
!   int scalar_p = MEM_IN_SCALAR_P (ref);
    int volatile_p = MEM_VOLATILE_P (ref);
    int unchanging_p = RTX_UNCHANGING_P (ref);
  
--- 530,536 ----
    /* Note that it is always safe to get these flags, though they won't
       be what we think if REF is not a MEM.  */
    int in_struct_p = MEM_IN_STRUCT_P (ref);
!   int scalar_p = MEM_SCALAR_P (ref);
    int volatile_p = MEM_VOLATILE_P (ref);
    int unchanging_p = RTX_UNCHANGING_P (ref);
  
Index: config/alpha/alpha.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/alpha/alpha.c,v
retrieving revision 1.70
diff -c -p -d -r1.70 alpha.c
*** alpha.c	1999/01/19 12:08:32	1.70
--- alpha.c	1999/01/21 09:54:17
*************** input_operand (op, mode)
*** 613,618 ****
--- 613,621 ----
      case CONST_INT:
        return mode == QImode || mode == HImode || add_operand (op, mode);
  
+     case CONSTANT_P_RTX:
+       return 1;
+ 
      default:
        break;
      }
Index: config/arc/arc.md
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/arc/arc.md,v
retrieving revision 1.3
diff -c -p -d -r1.3 arc.md
*** arc.md	1998/12/16 21:01:19	1.3
--- arc.md	1999/01/21 09:54:17
***************
*** 1039,1045 ****
    [(set_attr "type" "unary")])
  
  (define_insn "*one_cmplsi2_set_cc_insn"
!   [(set (reg:CCZN 61) (compare:CC
  		       (not:SI (match_operand:SI 1 "register_operand" "r"))
  		       (const_int 0)))
     (set (match_operand:SI 0 "register_operand" "=r")
--- 1039,1045 ----
    [(set_attr "type" "unary")])
  
  (define_insn "*one_cmplsi2_set_cc_insn"
!   [(set (reg:CCZN 61) (compare:CCZN
  		       (not:SI (match_operand:SI 1 "register_operand" "r"))
  		       (const_int 0)))
     (set (match_operand:SI 0 "register_operand" "=r")
Index: config/arm/arm.h
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/arm/arm.h,v
retrieving revision 1.19
diff -c -p -d -r1.19 arm.h
*** arm.h	1999/01/19 10:32:33	1.19
--- arm.h	1999/01/21 09:54:17
*************** function tries to return. */
*** 385,391 ****
    {"abort-on-noreturn",         ARM_FLAG_ABORT_NORETURN,     \
     "Generate a call to abort if a noreturn function returns"}, \
    {"no-abort-on-noreturn",      -ARM_FLAG_ABORT_NORETURN, ""}, \
- 
    SUBTARGET_SWITCHES					\
    {"",				TARGET_DEFAULT }	\
  }
--- 385,390 ----
Index: config/c4x/c4x.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/c4x/c4x.c,v
retrieving revision 1.16
diff -c -p -d -r1.16 c4x.c
*** c4x.c	1999/01/19 10:32:21	1.16
--- c4x.c	1999/01/21 09:54:17
*************** const_operand (op, mode)
*** 2612,2617 ****
--- 2612,2620 ----
      case Pmode:
  #endif
      case QImode:
+       if (GET_CODE (op) == CONSTANT_P_RTX)
+ 	return 1;
+ 
        if (GET_CODE (op) != CONST_INT
  	  || (GET_MODE (op) != VOIDmode && GET_MODE (op) != mode)
  	  || GET_MODE_CLASS (mode) != MODE_INT)
Index: config/i370/i370.md
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/i370/i370.md,v
retrieving revision 1.3
diff -c -p -d -r1.3 i370.md
*** i370.md	1998/12/16 21:03:01	1.3
--- i370.md	1999/01/21 09:54:18
*************** check_label_emit ();
*** 2125,2131 ****
  
  (define_insn ""
    [(set (match_operand:DI 0 "register_operand" "=d")
! 	(mult:SI (match_operand:DI 1 "general_operand" "%0")
  		 (match_operand:SI 2 "general_operand" "g")))]
    ""
    "*
--- 2125,2131 ----
  
  (define_insn ""
    [(set (match_operand:DI 0 "register_operand" "=d")
! 	(mult:DI (match_operand:DI 1 "general_operand" "%0")
  		 (match_operand:SI 2 "general_operand" "g")))]
    ""
    "*
*************** check_label_emit ();
*** 2281,2287 ****
  
  (define_insn ""
    [(set (match_operand:DI 0 "register_operand" "=d")
! 	(div:SI (match_operand:DI 1 "register_operand" "0")
  		(match_operand:SI 2 "general_operand" "")))]
    ""
    "*
--- 2281,2287 ----
  
  (define_insn ""
    [(set (match_operand:DI 0 "register_operand" "=d")
! 	(div:DI (match_operand:DI 1 "register_operand" "0")
  		(match_operand:SI 2 "general_operand" "")))]
    ""
    "*
*************** check_label_emit ();
*** 2441,2447 ****
  
  (define_insn ""
    [(set (match_operand:DI 0 "register_operand" "=d")
! 	(mod:SI (match_operand:DI 1 "register_operand" "0")
  		(match_operand:SI 2 "general_operand" "")))]
    ""
    "*
--- 2441,2447 ----
  
  (define_insn ""
    [(set (match_operand:DI 0 "register_operand" "=d")
! 	(mod:DI (match_operand:DI 1 "register_operand" "0")
  		(match_operand:SI 2 "general_operand" "")))]
    ""
    "*
Index: config/i860/i860.c
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/i860/i860.c,v
retrieving revision 1.5
diff -c -p -d -r1.5 i860.c
*** i860.c	1998/12/16 21:05:34	1.5
--- i860.c	1999/01/21 09:54:18
*************** output_delayed_branch (template, operand
*** 1447,1453 ****
  	}
  
        insn_extract (delay_insn);
!       if (! constrain_operands (insn_code_number, 1))
  	fatal_insn_not_found (delay_insn);
  
        template = insn_template[insn_code_number];
--- 1447,1453 ----
  	}
  
        insn_extract (delay_insn);
!       if (! constrain_operands (1))
  	fatal_insn_not_found (delay_insn);
  
        template = insn_template[insn_code_number];
*************** output_delay_insn (delay_insn)
*** 1490,1496 ****
      }
  
  #ifdef REGISTER_CONSTRAINTS
!   if (! constrain_operands (insn_code_number, 1))
      abort ();
  #endif
  
--- 1490,1496 ----
      }
  
  #ifdef REGISTER_CONSTRAINTS
!   if (! constrain_operands (1))
      abort ();
  #endif
  
Index: config/m88k/m88k.md
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/m88k/m88k.md,v
retrieving revision 1.5
diff -c -p -d -r1.5 m88k.md
*** m88k.md	1998/12/16 21:08:25	1.5
--- m88k.md	1999/01/21 09:54:18
***************
*** 759,765 ****
  
  (define_insn ""
    [(set (match_operand:CCEVEN 0 "register_operand" "=r")
! 	(rotate:CC (match_operand 1 "partial_ccmode_register_operand" "r")
  		   (match_operand:CC 2 "int5_operand" "")))]
    ""
    "rot %0,%1,%2"
--- 759,765 ----
  
  (define_insn ""
    [(set (match_operand:CCEVEN 0 "register_operand" "=r")
! 	(rotate:CCEVEN (match_operand 1 "partial_ccmode_register_operand" "r")
  		   (match_operand:CC 2 "int5_operand" "")))]
    ""
    "rot %0,%1,%2"
***************
*** 782,788 ****
  
  (define_insn ""
    [(set (match_operand:CCEVEN 0 "register_operand" "=r")
! 	(ior:CC (rotate:CC (match_operand 1 "partial_ccmode_register_operand" "r")
  			   (match_operand:CC 2 "int5_operand" ""))
  		(match_operand 3 "partial_ccmode_register_operand" "r")))
     (clobber (match_scratch:CCEVEN 4 "=r"))]
--- 782,788 ----
  
  (define_insn ""
    [(set (match_operand:CCEVEN 0 "register_operand" "=r")
! 	(ior:CCEVEN (rotate:CC (match_operand 1 "partial_ccmode_register_operand" "r")
  			   (match_operand:CC 2 "int5_operand" ""))
  		(match_operand 3 "partial_ccmode_register_operand" "r")))
     (clobber (match_scratch:CCEVEN 4 "=r"))]
***************
*** 2128,2188 ****
    expand_block_move (dest_mem, src_mem, operands);
    DONE;
  }")
- 
- (define_insn ""
-   [(set (match_operand:QI 0 "register_operand" "=r")
- 	(match_operand:BLK 1 "memory_operand" "m"))]
-   ""
-   "%V1ld.bu\\t %0,%1"
-   [(set_attr "type" "load")])
  
! (define_insn ""
!   [(set (match_operand:HI 0 "register_operand" "=r")
! 	(match_operand:BLK 1 "memory_operand" "m"))]
!   ""
!   "%V1ld.hu\\t %0,%1"
!   [(set_attr "type" "load")])
! 
  (define_insn ""
!   [(set (match_operand:SI 0 "register_operand" "=r")
  	(match_operand:BLK 1 "memory_operand" "m"))]
    ""
!   "%V1ld\\t %0,%1"
    [(set_attr "type" "load")])
  
  (define_insn ""
-   [(set (match_operand:DI 0 "register_operand" "=r")
- 	(match_operand:BLK 1 "memory_operand" "m"))]
-   ""
-   "%V1ld.d\\t %0,%1"
-   [(set_attr "type" "loadd")])
- 
- (define_insn ""
-   [(set (match_operand:BLK 0 "memory_operand" "=m")
- 	(match_operand:QI 1 "register_operand" "r"))]
-   ""
-   "%v0st.b\\t %1,%0"
-   [(set_attr "type" "store")])
- 
- (define_insn ""
-   [(set (match_operand:BLK 0 "memory_operand" "=m")
- 	(match_operand:HI 1 "register_operand" "r"))]
-   ""
-   "%v0st.h\\t %1,%0"
-   [(set_attr "type" "store")])
- 
- (define_insn ""
-   [(set (match_operand:BLK 0 "memory_operand" "=m")
- 	(match_operand:SI 1 "register_operand" "r"))]
-   ""
-   "%v0st\\t %1,%0"
-   [(set_attr "type" "store")])
- 
- (define_insn ""
    [(set (match_operand:BLK 0 "memory_operand" "=m")
! 	(match_operand:DI 1 "register_operand" "r"))]
    ""
!   "%v0st.d\\t %1,%0"
    [(set_attr "type" "store")])
  
  ;; Call a non-looping block move library function (e.g. __movstrSI96x64).
--- 2128,2177 ----
    expand_block_move (dest_mem, src_mem, operands);
    DONE;
  }")
  
! ;; ??? We shouldn't be allowing such mode mismatches
  (define_insn ""
!   [(set (match_operand 0 "register_operand" "=r")
  	(match_operand:BLK 1 "memory_operand" "m"))]
    ""
!   "*
! {
!   switch (GET_MODE (operands[0]))
!     {
!     case QImode:
!       return \"%V1ld.bu\\t %0,%1\";
!     case HImode:
!       return \"%V1ld.hu\\t %0,%1\";
!     case SImode:
!       return \"%V1ld\\t %0,%1\";
!     case DImode:
!       return \"%V1ld.d\\t %0,%1\";
!     default:
!       abort ();
!     }
! }"
    [(set_attr "type" "load")])
  
  (define_insn ""
    [(set (match_operand:BLK 0 "memory_operand" "=m")
! 	(match_operand 1 "register_operand" "r"))]
    ""
!   "*
! {
!   switch (GET_MODE (operands[1]))
!     {
!     case QImode:
!       return \"%v0st.b\\t %1,%0\";
!     case HImode:
!       return \"%v0st.h\\t %1,%0\";
!     case SImode:
!       return \"%v0st\\t %1,%0\";
!     case DImode:
!       return \"%v0st.d\\t %1,%0\";
!     default:
!       abort ();
!     }
! }"
    [(set_attr "type" "store")])
  
  ;; Call a non-looping block move library function (e.g. __movstrSI96x64).
Index: config/ns32k/ns32k.md
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/ns32k/ns32k.md,v
retrieving revision 1.5
diff -c -p -d -r1.5 ns32k.md
*** ns32k.md	1998/12/16 21:10:39	1.5
--- ns32k.md	1999/01/21 09:54:21
***************
*** 1276,1282 ****
  ;; ever used when explicitly emitted by a define_expand.
  (define_insn "udivmoddisi4_internal"
    [(set (match_operand:DI 0 "reg_or_mem_operand" "=rm")
!         (unspec:SI [(match_operand:DI 1 "reg_or_mem_operand" "0")
                      (match_operand:SI 2 "general_operand" "g")] 0))]
    ""
    "deid %2,%0")
--- 1276,1282 ----
  ;; ever used when explicitly emitted by a define_expand.
  (define_insn "udivmoddisi4_internal"
    [(set (match_operand:DI 0 "reg_or_mem_operand" "=rm")
!         (unspec:DI [(match_operand:DI 1 "reg_or_mem_operand" "0")
                      (match_operand:SI 2 "general_operand" "g")] 0))]
    ""
    "deid %2,%0")
***************
*** 1341,1347 ****
  ;; way to do this, so just restrict operand 0 and 1 to be in registers.
  (define_insn "udivmoddihi4_internal"
    [(set (match_operand:DI 0 "register_operand" "=r")
!         (unspec:HI [(match_operand:DI 1 "register_operand" "0")
                      (match_operand:HI 2 "general_operand" "g")] 0))]
    ""
    "deiw %2,%0")
--- 1341,1347 ----
  ;; way to do this, so just restrict operand 0 and 1 to be in registers.
  (define_insn "udivmoddihi4_internal"
    [(set (match_operand:DI 0 "register_operand" "=r")
!         (unspec:DI [(match_operand:DI 1 "register_operand" "0")
                      (match_operand:HI 2 "general_operand" "g")] 0))]
    ""
    "deiw %2,%0")
***************
*** 1398,1404 ****
  ;; way to do this, so just restrict operand 0 and 1 to be in registers.
  (define_insn "udivmoddiqi4_internal"
    [(set (match_operand:DI 0 "register_operand" "=r")
!         (unspec:QI [(match_operand:DI 1 "reg_or_mem_operand" "0")
                      (match_operand:QI 2 "general_operand" "g")] 0))]
    ""
    "deib %2,%0")
--- 1398,1404 ----
  ;; way to do this, so just restrict operand 0 and 1 to be in registers.
  (define_insn "udivmoddiqi4_internal"
    [(set (match_operand:DI 0 "register_operand" "=r")
!         (unspec:DI [(match_operand:DI 1 "reg_or_mem_operand" "0")
                      (match_operand:QI 2 "general_operand" "g")] 0))]
    ""
    "deib %2,%0")
Index: config/romp/romp.md
===================================================================
RCS file: /egcs/carton/cvsfiles/egcs/gcc/config/romp/romp.md,v
retrieving revision 1.3
diff -c -p -d -r1.3 romp.md
*** romp.md	1998/12/16 21:11:39	1.3
--- romp.md	1999/01/21 09:54:22
***************
*** 651,657 ****
        start_sequence ();
        if (GET_CODE (operands[0]) != REG
  	  || ! refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
! 				  operands[1]), 0)
  	{
  	  emit_move_insn (operand_subword (op0, 0, 1, DFmode),
  			  operand_subword_force (op1, 0, DFmode));
--- 651,657 ----
        start_sequence ();
        if (GET_CODE (operands[0]) != REG
  	  || ! refers_to_regno_p (REGNO (operands[0]), REGNO (operands[0]) + 1,
! 				  operands[1], 0))
  	{
  	  emit_move_insn (operand_subword (op0, 0, 1, DFmode),
  			  operand_subword_force (op1, 0, DFmode));



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