H8/300 port bugfixes
Jeffrey A Law
law@cygnus.com
Fri Feb 12 12:31:00 GMT 1999
This patch fixes two problems with the H8/300 port.
The first fixes a problem if we end up with a (zero_extend (const_int ...))
The %e modifier output take wrong part of the CONST_INT. This change uses
the right modifier for CONST_INTs.
The second problem is a bogus peephole that tried to optimize consecutive
byte sized memory reference. The pattern was simply broken, and this patch
removes it.
* h8300.md (zero_extendhisi2 H8/300 variant): Correctly handle
extending a CONST_INT.
* h8300.md (peephole for combining memrefs): Delete incorrect peephole.
Index: h8300.md
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/h8300/h8300.md,v
retrieving revision 1.63
diff -c -3 -p -r1.63 h8300.md
*** h8300.md 1998/11/11 05:52:13 1.63
--- h8300.md 1999/02/12 20:23:19
***************
*** 1687,1701 ****
"TARGET_H8300"
"")
(define_insn ""
! [(set (match_operand:SI 0 "register_operand" "=r,r")
! (zero_extend:SI (match_operand:HI 1 "general_operand_src" "0,g>")))]
"TARGET_H8300"
"@
sub.w %e0,%e0
mov.w %e1,%f0\;sub.w %e0,%e0"
! [(set_attr "length" "2,4")
! (set_attr "cc" "clobber,clobber")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r,r")
--- 1687,1703 ----
"TARGET_H8300"
"")
+ ;; %e prints the high part of a CONST_INT, not the low part. Arggh.
(define_insn ""
! [(set (match_operand:SI 0 "register_operand" "=r,r,r")
! (zero_extend:SI (match_operand:HI 1 "general_operand_src" "0,i,g>")))]
"TARGET_H8300"
"@
sub.w %e0,%e0
+ mov.w %f1,%f0\;sub.w %e0,%e0
mov.w %e1,%f0\;sub.w %e0,%e0"
! [(set_attr "length" "2,4,4")
! (set_attr "cc" "clobber,clobber,clobber")])
(define_insn ""
[(set (match_operand:SI 0 "register_operand" "=r,r")
***************
*** 2244,2275 ****
;; ----------------------------------------------
;; Peepholes go at the end.
;; ----------------------------------------------
-
- ;; Notice when two byte moves in a row could be a word move.
-
- (define_peephole
- [(set (match_operand:QI 0 "register_operand" "=r")
- (mem:QI (plus:HI (match_operand:HI 1 "register_operand" "r")
- (match_operand:HI 2 "immediate_operand" "n"))))
- (set (match_operand:QI 3 "register_operand" "=r")
- (mem:QI (plus:HI (match_dup 1)
- (match_operand:HI 4 "immediate_operand" "n"))))]
- "(INTVAL(operands[2]) == INTVAL(operands[4])+1) && REGNO(operands[0]) +1 == REGNO(operands[3])"
- "mov.w @(%u4,%T1),%T0"
- [(set_attr "length" "6")
- (set_attr "cc" "set_znv")])
-
- (define_peephole
- [(set (mem:QI (plus:HI (match_operand:HI 1 "register_operand" "r")
- (match_operand:HI 2 "immediate_operand" "n")))
- (match_operand:QI 0 "register_operand" "r"))
- (set (mem:QI (plus:HI (match_dup 1)
- (match_operand:HI 4 "immediate_operand" "n")))
- (match_operand:QI 3 "register_operand" "r"))]
- "(INTVAL(operands[2]) == INTVAL(operands[4])+1) && REGNO(operands[0]) +1 == REGNO(operands[3])"
- "mov.w %T0,@(%u4,%T1)"
- [(set_attr "length" "6")
- (set_attr "cc" "set_znv")])
;; Notice a move which could be post incremented.
--- 2246,2251 ----
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