Patch to re-enable of use xor reg,reg on amd K6

[Jan Hubicka]

Hi
This patch disables AMD K6 optimization to emit mov $0, reg instead of xor
reg,reg.

My expriments show, that this change increase code size and slows down the
decoding on this CPU.  Because decoding is the main bottleneck there, code
is usually slower.

Honza

Mon Apr 12 19:47:22 CEST 1999 Jan Hubicka <hubicka@freesoft.cz>

	* i386.md: Do not output mov %0,reg on AMD K6.

*** i386.md.old2	Mon Apr 12 19:39:20 1999
--- i386.md	Mon Apr 12 19:45:20 1999
***************
*** 983,990 ****
    "*
  {
    rtx link;
!   if ((ix86_cpu != PROCESSOR_K6 || optimize_size)
!       && operands[1] == const0_rtx && REG_P (operands[0]))
      return AS2 (xor%L0,%0,%0);
  
    if (operands[1] == const1_rtx
--- 983,995 ----
    "*
  {
    rtx link;
! 
!   /* Use of xor was disabled for AMD K6 as recommended by the Optimization
!      Manual.  My test shows, that this generally hurts the performance, because
!      mov is longer and takes longer to decode and decoding is the main
!      bottleneck of K6 when executing GCC code.  */
! 
!   if (operands[1] == const0_rtx && REG_P (operands[0]))
      return AS2 (xor%L0,%0,%0);
  
    if (operands[1] == const1_rtx
***************
*** 1111,1118 ****
    "*
  {
    rtx link;
!   if ((ix86_cpu != PROCESSOR_K6 || optimize_size)
!       && operands[1] == const0_rtx && REG_P (operands[0]))
      return AS2 (xor%W0,%0,%0);
  
    if (operands[1] == const1_rtx
--- 1116,1128 ----
    "*
  {
    rtx link;
! 
!   /* Use of xor was disabled for AMD K6 as recommended by the Optimization
!      Manual.  My test shows, that this generally hurts the performance, because
!      mov is longer and takes longer to decode and decoding is the main
!      bottleneck of K6 when executing GCC code.  */
! 
!   if (operands[1] == const0_rtx && REG_P (operands[0]))
      return AS2 (xor%W0,%0,%0);
  
    if (operands[1] == const1_rtx