Confirming AVR-GCC supports for AVR Sx Series

[Aloysius Indrayanto]

Hello,

Thank you for the information.
That should do for now. If I need anything else, I’ll be in touch.

Best regards,
Aloysius


On Mon, Nov 3, 2025 at 11:01 PM Georg-Johann Lay <avr@gjlay.de> wrote:
>
> Am 02.11.25 um 04:15 schrieb Aloysius Indrayanto:
> >>> This might be the only viable approach if I want the Sx series to work with
> >>> older versions of GCC and AVR-LibC. Naturally, this method precludes the
> >>> use of -mcvt.
> >>
> >> CVT is unrelated.  It just changes the number of entries in the IVT,
> >> Though it's much more likely to hit the problem when there's not a
> >> legal word after the IVT.
> >>
> > I meant that the Microchip AVR-LibC built for CVT may use different
> > function names, making it incompatible with AVR-GCC.
>
> Dunno what Microchip is doing.  I referred to the AVR-LibC master at
>
> https://github.com/avrdudes/avr-libc
>
> which is not affiliated to Microchip — and never was.
>
> The CVT variant of the startup code is an additional feature
> that you'll have to explicitly turn on, for example by means of
> -nostartfiles crt<mcu>-cvt.o or, more conveniently, by -mcvt.
>
> And of course, AVR-LibC is using code that is compatible with GCC.
>
> For CVT, see
> https://avrdudes.github.io/avr-libc/avr-libc-user-manual-2.3.0/FAQ.html#faq_cvt
>
> > It seems that AVR-LibC 2.3 now includes the startup code that was
> > previously generated by AVR-GCC. However, I've noticed that AVR-GCC
>
> The startup code was never generated by GCC, it's hosted by AVR-LibC
> except functions like __do_clear_bss and __do_copy_data.  At least that
> is the case for the GNU GCC from https://gcc.gnu.org
>
> For the parts and purposes of the startup code, see
> https://avrdudes.github.io/avr-libc/avr-libc-user-manual-2.3.0/mem_sections.html#sec_dot_init
>
> > 15, when used with an older AVR-LibC, still generates the correct
> > startup code (at least it looks like that when I disassembly it). I'm
> > not sure if this will remain correct in the future or in other build
> > setups.
>
> Of course the startup code will still be correct and compatible with GCC
> and GNU Binutils.
>
> >>          ...
> >>          subi r30,lo8(-(gs(.L4)))         ;  96  [c=8 l=2]  *addhi3/1
> >>          sbci r31,hi8(-(gs(.L4)))
> >>          jmp __tablejump2__       ;  97  [c=8 l=2]  *tablejump/2
> >>          .subsection     1
> >>          .p2align        1
> >>          .type   .L4, @object
> >> .L4:
> >>          .word gs(.L10)
> >>          ...
> >>
> >> so that the last instruction of the function is not followed by a legal
> >> word.  It uses subsection in order to meet the section attribute.
> >> Similar code is produced from AVR-LibC since it uses section attributes.
> >>
> > Ah yes, this one will need to be fixed by the linker, or maybe in the
> > future, by special options so AVR-GCC will put NOP after the last
> > 'jmp' instruction of the function.
>
> Switch/case tables don't have JMP instructions for flash > 8 KiB, but
> gs() label addresses.  Hence the issue occurs before such table, not after.
>
> Johann
>