Libatomic 16B

[Xi Ruoyao]

On Fri, 2022-02-25 at 17:10 +0300, Alexander Monakov via Gcc-help wrote:

> > > https://cdrdv2.intel.com/v1/dl/getContent/671294

TL;DR: Intel says on their CPUs with AVX, 128-bit loads (with movdqa)
are atomic, see page 393 of this doc.  And this is updated in Dec 2021,
so you may need to re-download the Intel SDM to get a latest copy.

> > > Create an issue in bugzilla then?
> > 
> > Yes please.  I should have read the whole thread first. 8-)
> > 
> > The AMD manual doesn't say this yet, so any optimization needs to be
> > restricted to Intel CPUs for now.  I'll reach out to AMD to get
> > clarification.
> 
> This StackOverflow question has evidence that both Intel (Core Duo)
> and
> AMD (Opteron 2435) can tear 128-bit loads.

Core Duo does not have AVX, and AMD has not make any guarantee for the
atomicity of 128-bit load.  So we can't use movdqa for 128-bit atomics
on those old Intel and (old or new) AMD models.

> So neither manufacturer can
> give a retroactive guarantee.



> 
> https://stackoverflow.com/questions/7646018/sse-instructions-which-cpus-can-do-atomic-16b-memory-operations
> 
> Alexander

-- 
Xi Ruoyao <xry111@mengyan1223.wang>
School of Aerospace Science and Technology, Xidian University