[GCC 8,2] Aarch64-none-eabi UCVTF problem

[Mihailo Stojanovic]

Hi all,

ARM Cortex-A53 CPU stalls during the execution of
a bare metal application containing the following
assembly instruction:

ucvtf    s0, s0

According to the A64 ISA, UCVTF instruction doesn't
allow floating-point registers as source registers, but
executing the same instruction in qemu-arm user mode
yields a correct result. I am wondering whether this
is a compiler bug, or is there something I am missing?

Source code was compiled by the aarch64-none-eabi-gcc
(version 8.2.0) compiler, with -O3 and -fno-strict-aliasing
flags.

I am currently working on creating a minimal reproducer,
so I could provide it if necessary.

Note that manually modifying the assembly file to use
a general-purpose register as a source fixes this behaviour.

Best regards,
Mihailo