prevent zero-extension when using a memory load instruction

[William Tambe]

On Mon, Apr 20, 2020 at 5:50 AM Segher Boessenkool
<segher@kernel.crashing.org> wrote:
>
> Hi!
>
> On Sat, Apr 18, 2020 at 11:12:15AM -0400, William Tambe via Gcc-help wrote:
> > In the machine description file, is there a way to tell GCC that a
> > memory load instruction already zero-extend such that it does not try
> > to apply zero-extension ?
>
> At least on a load-store architecture (like a usual RISC), you get best
> results if you make a separate pattern for that, and then let combine
> combine the zero_extend with the load.

I tried creating zero_extend pattern that could move data from memory
to a register (aka memory load), however GCC never used it and
preferred using memory load followed by a zero-extend.

Any other suggestions ? I have been googling around with no solution in sight.

>
>
> Segher