prevent zero-extension when using a memory load instruction

[Segher Boessenkool]

Hi!

On Sat, Apr 18, 2020 at 11:12:15AM -0400, William Tambe via Gcc-help wrote:
> In the machine description file, is there a way to tell GCC that a
> memory load instruction already zero-extend such that it does not try
> to apply zero-extension ?

At least on a load-store architecture (like a usual RISC), you get best
results if you make a separate pattern for that, and then let combine
combine the zero_extend with the load.


Segher