Machine description for volatile memory access

[Jeff Law]

On 9/9/19 10:28 AM, William Tambe wrote:
> On Mon, Sep 9, 2019 at 10:21 AM Segher Boessenkool
> <segher@kernel.crashing.org> wrote:
>>
>> On Mon, Sep 09, 2019 at 09:48:46AM -0500, William Tambe wrote:
>>> Does GCC support machine description for volatile memory accesses that
>>> must not be cached ?
>>> In other words, when using expressions such as theses, volatile memory
>>> access instructions should be use:
>>>
>>> volatile uint8_t *m;
>>> uint8_t n;
>>>
>>> *m = 5; // Should use a volatile memory store instruction.
>>> n = *m; // Should use a volatile memory load instruction.
>>>
>>> If GCC has support for the above, are there any examples I could be
>>> pointed to in the sources ?
>>
>> There is no such thing as a "volatile memory load" (or store).  What is
>> it you really want to do?
> 
> I would like to be able to detect in the machine description that a
> memory load or store is being done for a volatile memory location.
> 
>>
>> "volatile" is a concept in the C language.  It doesn't translate to machine
>> instructions very well.  You might want to use support for atomic (via
>> builtins for example), or write assembler (or inline asm).
> 
> All I am looking for, is whether the "volatile" attribute can be
> detected from the machine description.
You can detect volatile on a MEM expression via
MEM_VOLATILE_P (mem).  It's documented in the developer manual.


But odds are if you're using it in a target description, then you're
tackling the wrong problem in the wrong place.

jeff