Machine description for volatile memory access

William Tambe tambewilliam@gmail.com
Mon Sep 9 14:49:00 GMT 2019


Does GCC support machine description for volatile memory accesses that
must not be cached ?
In other words, when using expressions such as theses, volatile memory
access instructions should be use:

volatile uint8_t *m;
uint8_t n;

*m = 5; // Should use a volatile memory store instruction.
n = *m; // Should use a volatile memory load instruction.

If GCC has support for the above, are there any examples I could be
pointed to in the sources ?



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