Memory model release/acquire mode interactions of relaxed atomic operations

[Jonathan Wakely]

On 4 May 2017 at 14:15, Toebs Douglass wrote:
> On 04/05/17 15:05, Jonathan Wakely wrote:
>> On 4 May 2017 at 13:58, Toebs Douglass wrote:
>>> On 04/05/17 14:44, Jonathan Wakely wrote:
>>>> Although there are also relaxed atomic operations (on atomic types)
>>>> which are not synchronization operations. Not all atomic operations
>>>> provide sequential consistency.
>>>
>>> If you had multiple cores issuing CAS with consume on a single variable,
>>> you'd get total order, I think?  and you wouldn't with relaxed because
>>> with relaxed you wouldn't get a compiler barrier.
>>
>> Forget about consume. It's underspecified, poorly understood and
>> poorly implemented.
>
> GCC says it promotes consume to acquire.  However, I *think* I
> understand consume (I almost certainly don't, of course :-) and it is
> something I do use in my code - I hope GCC gets it right one day.  I may
> be completely wrong, but I might go out on a limb and say it's the
> difference between emitting no barriers (relaxed), a compiler barrier
> (consume), or a compiler and memory barrier (acquire).

See http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2016/p0371r1.html