question about gcc rtx

[Jeff Law]

On 10/30/2015 02:23 AM, htio2 wrote:
> Hi, how do I constraint the rtx to generate movsi Insn that only use odd
> 16bits register number (R1, R3, R5 ..) ? for register pairing (e.g R1 and R2
> is a pair, R3 and R4 ...) .
Generally register pairing is handled by HARD_REGNO_MODE_OK and its 
related macros.   Many targets use register pairs to handle modes larger 
than their word_size.   ie, 64bit moves on 32 bit targets.  I recommend 
looking at other ports to see how that's handled.

Jeff