gcc instruction cost

[Jeff Law]

On 10/14/2015 10:47 AM, htio2 wrote:
> I am porting gcc backend to a new target, I understood that there is a
> target_rtx_costs macro and i am currently looking into it, for my target it
> will be mainly on the code size.
OK.

>
> I have some experience porting sdcc ( small device C compiler ) the way they
> do it is ,they will try different of register allocation and compare the
> cost with each other and it took a long time to compile, just want to know
> if gcc do it any differently.
GCC doesn't do things that way in the register allocator.

However, it does use a similar model for other parts of the compiler 
where it compares the expected cost of two RTL hunks to select the 
cheaper one.  In some cases it may look at a sequence of insns and 
compare them in a similar manner.

For this class of problems you want to be looking at target_rtx_costs, 
address_cost, const_costs, register_move_cost, memory_move_cost 
costs_n_insns as well.

Jeff