Proper use of x86/x86_64 CPUID instruction with extended assembler

[Jeffrey Walton]

>>>> (I also looked at
>>>> https://gcc.gnu.org/ml/gcc-patches/2007-09/msg00324.html, which is a
>>>> GCC patch for cpuid.h. But its not clear to me if the above is correct
>>>> because the operands are 32-bit in size. Naively, if I use "a" and "b"
>>>> with a 32-bit operand, then I would expect code for EAX and EBX; and
>>>> not RAX and RBX).
>>>
>>> It is correct.
>>
>> Thanks Avi. Regarding the GCC patch... if the output register and the
>> ABI tells GCC that EBX needs to be preserved, then why does the patch
>> take special steps to preserve it?
>>
>
> Well I just tried it, and gcc is indeed not clever enough to do this on its
> own.  So it is needed.

Thanks. Another related question....

According to Assembler Templates
(https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html#AssemblerTemplate),
the save of the EBX register and the call to CPUID can be reordered,
even with volatile.

Should there be separate "asm volatile" statements as suggested by the
page that discusses Assembler Templates?

(Sorry to hit this in detail. I suspect I've seen a lot of bad
examples out there; I could not find an "official" GCC example; and
I'm deep diving it because its going into production code).

Jeff