mtlo/mflo instructions when issue width is increased (MIPS 5kc)

[Cherry Vanc]

Thanks a lot for your comments. I figured that the IRA was spilling to
lo as adding a functional unit led to additional register pressure.

On Wed, Sep 17, 2014 at 7:13 PM, Segher Boessenkool
<segher@kernel.crashing.org> wrote:
> On Wed, Sep 17, 2014 at 04:59:38PM -0700, Cherry Vanc wrote:
>> I added a functional unit to the MIPS 5kc backend for memory
>> operations and noticed that a function started getting mtlo / mflo
>> instructions in the prologue/epilogue. The function does not have any
>> mult/div instructions.
>>
>> When I debug the source of these instructions, I can only tap into the
>> code path when GCC is looking for the instruction suiting the RTL
>> pattern (final.c).
>>
>> Why are these instructions being generated when I simply just added a
>> functional unit to the pipeline description ? How can I debug why they
>> are being generated in the first place ?
>
> Add -dap to your gcc command line.  Also use -S, not -c.
>
> Cheers,
>
>
> Segher