ColdFire and Thread-Local Storage
Norbert Lange
lange@chello.at
Wed Jan 29 19:50:00 GMT 2014
Hello,
its been some time since I looked at the TLS conventions and I only done
this on ARM.
But I would strongly advise you to implement the function in asm, on ARM
you arent allowed to change any register except the one you return and I
would bet its the same on other architectures.
Norbert
Am 29.01.2014, 08:51 Uhr, schrieb Sebastian Huber
<sebastian.huber@embedded-brains.de>:
> On 2014-01-28 20:15, Ian Lance Taylor wrote:
>> On Tue, Jan 28, 2014 at 7:49 AM, Sebastian Huber
>> <sebastian.huber@embedded-brains.de> wrote:
>>>
>>> it seems GCC uses this ColdFire TLS ABI:
>>>
>>> https://lists.debian.org/debian-68k/2007/11/msg00071.html
>>>
>>> Here we have a function
>>>
>>> void *__m68k_read_tp(void)
>>>
>>> which must return the thread pointer in register a0.
>>>
>>> I have to implement this function. Is there a way to instruct GCC to
>>> return
>>> the value in register a0 instead of d0 or do I have to use assembler to
>>> implement this function?
>>
>> I believe that on m68k GNU/Linux a function that returns a pointer
>> will normally return the value in a0.
>>
>> Ian
>>
>
> The function
>
> void *__m68k_read_tp(void)
> {
> const Thread_Control *executing = _Thread_Get_executing();
>
> return (char *) executing->Start.tls_area +
> _TLS_Get_thread_control_block_area_size((uintptr_t) _TLS_Alignment)
> + 0x7000;
> }
>
> translates to
>
> __m68k_read_tp:
> move.l #_TLS_Alignment,%d0
> moveq #8,%d1
> move.l _Per_CPU_Information+18,%a0
> cmp.l %d0,%d1
> jls .L2
> moveq #8,%d0
> .L2:
> add.l #28672,%d0
> add.l 194(%a0),%d0
> rts
>
> I use now:
>
> void __m68k_read_tp(void)
> {
> const Thread_Control *executing = _Thread_Get_executing();
> void *tp = (char *) executing->Start.tls_area +
> _TLS_Get_thread_control_block_area_size((uintptr_t) _TLS_Alignment)
> + 0x7000;
>
> __asm__ volatile (
> "move.l %0, %%a0"
> :
> : "d" (tp)
> );
> }
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