Fri Nov 22 11:52:00 GMT 2013
On 21/11/13 17:02, Jeff Law wrote:
> On 11/21/13 03:56, Brian Drummond wrote:
>> On Thu, 2013-11-21 at 11:23 +0100, David Brown wrote:
>>> On 21/11/13 09:22, eljedi . wrote:
>>>> Thank you guys for the answers.
>>>> Now I have a lot to read and learn.
>>>> On Wed, Nov 20, 2013 at 8:17 PM, Oleg Endo <email@example.com>
>>>>> On Wed, 2013-11-20 at 19:25 +0100, eljedi . wrote:
>>>>>> Thank you Jonathan for the quick reply.
>>> The AVR is in fact an 8-bit cpu - I think it is the only 8-bit target
>>> that is supported by gcc mainline.
>>> For a 16-bit cpu, look at the msp430 port. It has just recently been
>>> added to mainline - previously it was developed outside the main gcc
>>> tree. But being a new port, or at least a newly cleaned up port, it
>>> should be a good example to start with.
>> Excellent news! Which release version includes (or will include) the
> Good grief, no. Not the msp430 which has odd sized pointers. If you're
> going to do a 16 bit port, do a pure one. Anything with PSImode should
> be avoided as a learning experience.
> For someone trying to learn, I'd stick with one of the simple 32bit
> embeded riscy processors. v850 for example.
The 20-bit pointers are only used for some msp430 devices, and even then
only in "large" memory models. I haven't looked at the port code at
all, but I am sure it will be possible to gloss over the 20-bit stuff
when reading the code for learning purposes. Apart from the 20-bit
support, the msp430 should be a pretty nice example as it has a mostly
orthogonal ISA with 16 16-bit registers. And since it was updated and
contributed to mainline recently by gcc experts, I expect it to be a
good, modern gcc port.
I have no idea about the v850, however - it may be more appropriate,
despite being 32-bit rather than 16-bit. Almost certainly, it would be
useful for the OP to look at more than one architecture anyway.
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