builtin assembler constraints

Chung-Ju Wu jasonwucj@gmail.com
Sat Feb 9 06:42:00 GMT 2013


2013/2/9 Grobman Alexander-R53196 <R53196@freescale.com>:
> "
> The valid set of registers for any argument are always expressed through constraints.
> "
>
> So if valid set is r5-r12 how do I express that?
>
> Alex.
>

Hi Grobman,

You need to design your customized reg_class, REG_CLASS_NAMES,
and REG_CLASS_CONTENTS. Also, you need to create new constraints
corresponding to the reg_class.

For your reference, here is my implementation for nds32 target:
(Sorry this target porting is not available yet on the GCC mainline.
 But I am planning to contribute it into GCC 4.9 before stage 3.)

First, design our own valid register set, LOW_REGS, MIDDLE_REGS, and HIGH_REGS:

442 /* In nds32 target, we have three levels of registers:
443      LOW_COST_REGS    : $r0 ~ $r7
444      MIDDLE_COST_REGS : $r8 ~ $r11, $r16 ~ $r19
445      HIGH_COST_REGS   : $r12 ~ $r14, $r20 ~ $r31 */
446 enum reg_class
447 {
448   NO_REGS,
449   LOW_REGS,
450   MIDDLE_REGS,
451   HIGH_REGS,
... ...
457   GENERAL_REGS,
458   FRAME_REGS,
459   ALL_REGS,
460   LIM_REG_CLASSES
461 };


Second, design the strings corresponding to them:

465 #define REG_CLASS_NAMES \
466 {                       \
467   "NO_REGS",            \
468   "LOW_REGS",           \
469   "MIDDLE_REGS",        \
470   "HIGH_REGS",          \
... ...
476   "GENERAL_REGS",       \
477   "FRAME_REGS",         \
478   "ALL_REGS"            \
479 }


Third, set the REG_CLASS_CONTENTS in bitwise fashion:

481 #define REG_CLASS_CONTENTS \
482 {                                                             \
483   {0x00000000, 0x00000000}, /* NO_REGS      :              */ \
484   {0x000000ff, 0x00000000}, /* LOW_REGS     : 0-7          */ \
485   {0x000f0f00, 0x00000000}, /* MIDDLE_REGS  : 8-11, 16-19  */ \
486   {0xfff07000, 0x00000000}, /* HIGH_REGS    : 12-14, 20-31 */ \
... ...
492   {0xffffffff, 0x00000000}, /* GENERAL_REGS : 0-31         */ \
493   {0x00000000, 0x00000003}, /* FRAME_REGS   : 32, 33       */ \
494   {0xffffffff, 0x00000003}  /* ALL_REGS     : 0-31, 32, 33 */ \
495 }


Finally, create new constraints corresponding to the reg_class:

28 (define_register_constraint "l" "LOW_REGS"
29   "Low cost registers $r0 ~ $r7")
30
31 (define_register_constraint "d" "MIDDLE_REGS"
32   "Middle cost registers $r8 ~ $r11, $r16 ~ $r19")
33
34 (define_register_constraint "h" "HIGH_REGS"
35   "High cost registers $r12 ~ $r14, $r20 ~ $r31")
36


After that, we can use 'l', 'd', or 'h' in the machine description.
Hope it helps ~ :)


Best regards,
jasonwucj



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