Conditional execution

Abdul Wahid Memon engrwahidmemon@gmail.com
Tue Aug 13 15:40:00 GMT 2013


Thanks. The conditional instruction that I am having is present even
before if-conversion pass.

Regards

Abdul

On Tue, Aug 13, 2013 at 5:34 PM, Kyrylo Tkachov <kyrylo.tkachov@arm.com> wrote:
>> Hello
>>
>> Conditional instructions such as "movsicc_noc" are usually introduced
>> by if-conversion transformation which happens at RTL level.
>>
>> Is there any other transformation which introduces conditional
>> instructions? I am having a conditional instruction even after
>> disabling if-conversion transformations.
>
> A backend can also generate cond_exec RTL which will be mapped to conditional
> instructions.
> Various splitters and peepholes can produce them.
>
> For example, arm has the following splitter:
>
> (define_split
>   [(set (match_operand:SI 0 "s_register_operand" "")
>         (eq:SI (match_operand:SI 1 "s_register_operand" "")
>                (const_int 0)))
>    (clobber (reg:CC CC_REGNUM))]
>   "TARGET_32BIT && reload_completed"
>   [(parallel
>     [(set (reg:CC CC_REGNUM)
>           (compare:CC (const_int 1) (match_dup 1)))
>      (set (match_dup 0)
>           (minus:SI (const_int 1) (match_dup 1)))])
>    (cond_exec (ltu:CC (reg:CC CC_REGNUM) (const_int 0))
>               (set (match_dup 0) (const_int 0)))])
>
> which splits an RTL expression without cond_execs into one with conditional
> execution.
>
> HTH,
> Kyrill
>
>
>>
>> Regards
>>
>> Abdul
>
>
>
>



More information about the Gcc-help mailing list