Failure of subreg expression in reload

[Sumanth Gundapaneni]

Hi,

I have a regression w.r.t subreg expression in reload phase for the
recently posted cr16 patch .
(http://gcc.gnu.org/ml/gcc-patches/2011-04/msg00624.html).

I guess this issue is kind of similar to what avr port is facing as 
per http://gcc.gnu.org/ml/gcc/2011-02/msg00444.html . 

Since the CR16 port has multiple width registers I am facing quite a few 
problems related to subreg expressions. Though I addressed most of the 
issues and I found a regression  with optimization (-On) in 
gcc.c-torture/compile/ and the test case is ptr-conv-1.c. 

GCC version used : 4.5.1

The test case is : 
long long a;
void
f (void)
{
  int c = 1;
  volatile int *p = &c;
  a = (long long) (__PTRDIFF_TYPE__) p;
  *p;
}

and the output at command prompt looks like

$ build/gcc/gcc/cc1 ptr-conv-1.c -O
f
Analyzing compilation unit
Performing interprocedural optimizations
 <*free_lang_data> <visibility> <early_local_cleanups> <whole-program> <inline> 
 <static-var> <pure-const>Assembling functions:
 f
ptr-conv-1.c: In function 'f':
ptr-conv-1.c:11:1: internal compiler error: in gen_rtx_SUBREG, at emit-rtl.c:776
Please submit a full bug report,
with preprocessed source if appropriate.
See <http://gcc.gnu.org/bugs.html> for instructions.


After debugging this for a while I figured it out the issue due to  reload.
The rtl dump for the above test case is

ptr-conv-1.c.141r.expand:
___________________________

insn 6 5 7 3 ptr-conv-1.c:7 (set (mem/c/i:HI (reg/f:SI 17 virtual-stack-vars) [0 c+0 S2 A32])
        (const_int 1 [0x1])) -1 (nil))

(insn 7 6 8 3 ptr-conv-1.c:8 (set (reg/v/f:SI 21 [ p ])
        (reg/f:SI 17 virtual-stack-vars)) -1 (nil))

(insn 8 7 9 3 ptr-conv-1.c:9 (set (reg/f:SI 26)
        (symbol_ref:SI ("a")  <var_decl 0xb8019000 a>)) -1 (nil))

(insn 9 8 10 3 ptr-conv-1.c:9 (set (mem/c/i:SI (reg/f:SI 26) [0 a+0 S4 A32])
        (reg/v/f:SI 21 [ p ])) -1 (nil))

(insn 10 9 11 3 ptr-conv-1.c:9 (set (reg:HI 28)
        (ashiftrt:HI (subreg:HI (reg/v/f:SI 21 [ p ]) 2)
            (const_int 15 [0xf]))) -1 (nil))

(insn 11 10 12 3 ptr-conv-1.c:9 (set (mem/c/i:HI (const:SI (plus:SI (symbol_ref:SI ("a")  <var_decl 0xb8019000 a>)
                    (const_int 4 [0x4]))) [0 a+4 S2 A32])
        (reg:HI 28)) -1 (nil))

(insn 12 11 13 3 ptr-conv-1.c:9 (set (mem/c/i:HI (const:SI (plus:SI (symbol_ref:SI ("a")  <var_decl 0xb8019000 a>)
                    (const_int 6 [0x6]))) [0 a+6 S2 A16])
        (reg:HI 28)) -1 (nil))

(insn 13 12 14 3 ptr-conv-1.c:10 (set (reg:HI 24 [ vol.2 ])
        (mem/v:HI (reg/v/f:SI 21 [ p ]) [0 S2 A16])) -1 (nil))
		
		
ptr-conv-1.c.185r.asmcons:
__________________________
 
(insn 6 3 9 2 ptr-conv-1.c:7 (set (mem/c/i:HI (reg/f:SI 13 r13) [0 c+0 S2 A32])
        (const_int 1 [0x1])) 66 {*movhi_short} (nil))

(insn 9 6 10 2 ptr-conv-1.c:9 (set (mem/c/i:SI (symbol_ref:SI ("a")  <var_decl 0xb8019000 a>) [0 a+0 S4 A32])
        (reg/f:SI 13 r13)) 63 {*movsi_long} (nil))

(insn 10 9 11 2 ptr-conv-1.c:9 (set (reg:HI 28)
        (ashiftrt:HI (subreg:HI (reg/f:SI 13 r13) 2)
            (const_int 15 [0xf]))) 44 {ashrhi3_imm_insn} (nil))

(insn 11 10 12 2 ptr-conv-1.c:9 (set (mem/c/i:HI (const:SI (plus:SI (symbol_ref:SI ("a")  <var_decl 0xb8019000 a>)
                    (const_int 4 [0x4]))) [0 a+4 S2 A32])
        (reg:HI 28)) 66 {*movhi_short} (nil))

(insn 12 11 13 2 ptr-conv-1.c:9 (set (mem/c/i:HI (const:SI (plus:SI (symbol_ref:SI ("a")  <var_decl 0xb8019000 a>)
                    (const_int 6 [0x6]))) [0 a+6 S2 A16])
        (reg:HI 28)) 66 {*movhi_short} (expr_list:REG_DEAD (reg:HI 28)
        (nil)))

(insn 13 12 0 2 ptr-conv-1.c:10 (set (reg:HI 24 [ vol.2 ])
        (mem/v:HI (reg/f:SI 13 r13) [0 S2 A16])) 66 {*movhi_short} (expr_list:REG_UNUSED (reg:HI 24 [ vol.2 ])
        (nil)))


Back trace for the ICE:
________________________ 

gen_rtx_SUBREG (mode=HImode, reg=0xb7ef4240, offset=2)
    at /home/sumanth/v105/src/gcc-4.5.1/gcc/emit-rtl.c:776
#1  0x083557c1 in eliminate_regs_1 (x=0xb7ef5e04, mem_mode=VOIDmode, insn=0x0, 
    may_use_invariant=0 '\0') at /home/sumanth/v105/src/gcc-4.5.1/gcc/reload1.c:2863
#2  0x0835684c in eliminate_regs_in_insn (insn=0xb7f4b57c, replace=0)
    at /home/sumanth/v105/src/gcc-4.5.1/gcc/reload1.c:3466
#3  0x0835303c in calculate_needs_all_insns (global=1)
    at /home/sumanth/v105/src/gcc-4.5.1/gcc/reload1.c:1651
#4  0x08351bc5 in reload (first=0xb7efb5e0, global=1)
    at /home/sumanth/v105/src/gcc-4.5.1/gcc/reload1.c:1073
#5  0x082a6869 in ira (f=0x87e5b30) at /home/sumanth/v105/src/gcc-4.5.1/gcc/ira.c:3315
#6  0x082a6b9b in rest_of_handle_ira () at /home/sumanth/v105/src/gcc-4.5.1/gcc/ira.c:3387
#7  0x0830c31e in execute_one_pass (pass=0x8762f20)
    at /home/sumanth/v105/src/gcc-4.5.1/gcc/passes.c:1568
#8  0x0830c602 in execute_pass_list (pass=0x8762f20)
    at /home/sumanth/v105/src/gcc-4.5.1/gcc/passes.c:1623

........................................................................................................
........................................................................................................


Conclusion: 
___________
The test case passes if run with "-O1 -fno-omit-frame-pointer".
The subreg in ashift is the cause for ICE. Specially the subreg byte 
(value of 2) triggers the ICE.  

(insn 10 9 11 2 ptr-conv-1.c:9 (set (reg:HI 28)
        (ashiftrt:HI (subreg:HI (reg/f:SI 13 r13) 2)
            (const_int 15 [0xf]))) 44 {ashrhi3_imm_insn} (nil))


is converted to 

(insn 10 9 11 2 ptr-conv-1.c:9 (set (reg:HI 28)
        (ashiftrt:HI (subreg:HI (reg/f:SI 15 r15) 2)
            (const_int 15 [0xf]))) 44 {ashrhi3_imm_insn} (nil))


Since the pattern supports only short regs, r15 was reloaded with
r0. It was only during this phase , cc1 hits ICE.


I have been working on this issue for quite some time.
Any help in this issue is highly appreciated.


Thanks in advance,
Sumanth G