[New port] segfault in copy_to_mode_reg(PSImode, NULL)
Aurelien Buhrig
aurelien.buhrig.gcc@gmail.com
Mon Jun 20 15:48:00 GMT 2011
I think I found why gcc was crashing. It was due to register number
error (SP_REG) in REGNO_REG_CLASS(R).
Now I have an ICE, almost exactly at the same point...
gcc tries to convert a PSImode reg (in convert_memory_address) into
BLKmode register...
Any idea what could be wrong ?
Thanks,
Aurelien
2011/6/17 Aurelien BUHRIG <aurelien.buhrig.gcc@gmail.com>:
> Hi all,
>
> I'm trying to modify a GCC (4.3.3) port we did 2 years ago (which was
> working...). The MCU is a 16-bit MCU and I try to extend the
> addressing space from HI to PSI. I get inspiration from m32c.The new
> target has PSI registers as base regs, and special insn to use them.
>
> I have a segfault pb in the 2nd pass (I'm not sure about the pass)
> while compiling libgcc2 (negdi). It seems the generated rtx structure
> is not correctly set. valgrind do not report any pb, except before
> segfaulting...
>
> The pb occurs in copy_to_mode_reg due to a NULL rtx (backtrace/faulty
> rtx after).
>
> Any hint to help me fixing my backend ?
>
> Thanks,
> Aurélien
>
> Backtrace
>
> #0 0x000000000050b9e5 in copy_to_mode_reg (mode=PSImode, x=0x0) at
> <...>/src/gcc/explow.c:621
> #1 0x00000000005206d3 in set_storage_via_libcall (object=0x8a15ec0,
> size=0x88a1480, val=0x88a1400, tailcall=0 '\000') at
> <...>/src/gcc/expr.c:2644
> #2 0x0000000000520665 in clear_storage_hints (object=0x8a15ec0,
> size=0x88a1480, method=BLOCK_OP_NORMAL, expected_align=0,
> expected_size=-1) at <...>/src/gcc/expr.c:2618
> #3 0x00000000005206a8 in clear_storage (object=0x8a15ec0,
> size=0x88a1480, method=BLOCK_OP_NORMAL) at <...>/src/gcc/expr.c:2627
> #4 0x000000000052598b in store_constructor (exp=0x8a09de0,
> target=0x8a15ec0, cleared=0, size=8) at <...>/src/gcc/expr.c:5134
> #5 0x000000000052a305 in expand_constructor (exp=0x8a09de0,
> target=0x8a15ec0, modifier=EXPAND_NORMAL, avoid_temp_mem=0 '\000') at
> <...>/src/gcc/expr.c:7013
> #6 0x000000000052b5da in expand_expr_real_1 (exp=0x8a09de0,
> target=0x8a15ec0, tmode=BLKmode, modifier=EXPAND_NORMAL,
> alt_rtl=0x7feffec88) at <...>/src/gcc/expr.c:7506
> #7 0x000000000052a472 in expand_expr_real (exp=0x8a09de0,
> target=0x8a15ec0, tmode=BLKmode, modifier=EXPAND_NORMAL,
> alt_rtl=0x7feffec88) at <...>/src/gcc/expr.c:7115
> #8 0x0000000000524758 in store_expr (exp=0x8a09de0, target=0x8a15ec0,
> call_param_p=0, nontemporal=0 '\000') at <...>/src/gcc/expr.c:4584
> #9 0x0000000000523c52 in expand_assignment (to=0x8998a00,
> from=0x8a09de0, nontemporal=0 '\000') at <...>/src/gcc/expr.c:4367
> #10 0x000000000053120b in expand_expr_real_1 (exp=0x889e300,
> target=0x0, tmode=VOIDmode, modifier=EXPAND_NORMAL, alt_rtl=0x0) at
> <...>/src/gcc/expr.c:9158
> #11 0x000000000052a449 in expand_expr_real (exp=0x889e300,
> target=0x88a1400, tmode=VOIDmode, modifier=EXPAND_NORMAL, alt_rtl=0x0)
> at <...>/src/gcc/expr.c:7109
> #12 0x0000000000667942 in expand_expr (exp=0x889e300,
> target=0x88a1400, mode=VOIDmode, modifier=EXPAND_NORMAL) at
> <...>/src/gcc/expr.h:514
> #13 0x0000000000668206 in expand_expr_stmt (exp=0x889e300) at
> <...>/src/gcc/stmt.c:1361
> #14 0x000000000082ae40 in expand_gimple_basic_block (bb=0x8a1d4e0) at
> <...>/src/gcc/cfgexpand.c:1610
> #15 0x000000000082bcc9 in tree_expand_cfg () at <...>/src/gcc/cfgexpand.c:1921
> #16 0x00000000005dfcdf in execute_one_pass (pass=0xc4d580) at
> <...>/src/gcc/passes.c:1122
> #17 0x00000000005dfe43 in execute_pass_list (pass=0xc4d580) at
> <...>/src/gcc/passes.c:1176
> #18 0x00000000006b9458 in tree_rest_of_compilation (fndecl=0x89799c0)
> at <...>/src/gcc/tree-optimize.c:404
> #19 0x00000000007de32f in cgraph_expand_function (node=0x88a3e00) at
> <...>/src/gcc/cgraphunit.c:1166
> #20 0x00000000007de4df in cgraph_expand_all_functions () at
> <...>/src/gcc/cgraphunit.c:1229 #21 0x00000000007dea94 in
> cgraph_optimize () at <...>/src/gcc/cgraphunit.c:1436 #22
> 0x0000000000417ff7 in c_write_global_declarations () at
> <...>/src/gcc/c-decl.c:8086 #23 0x0000000000672a9b in compile_file ()
> at <...>/src/gcc/toplev.c:1055
> #24 0x0000000000674611 in do_compile () at <...>/src/gcc/toplev.c:2240
> #25 0x0000000000674675 in toplev_main (argc=70, argv=0x7fefff9e8) at
> <...>/src/gcc/toplev.c:2272
> #26 0x0000000000479383 in main (argc=70, argv=0x7fefff9e8) at
> <...>/src/gcc/main.c:35
>
>
> The "object" parameter in set_storage_via_libcall seems "correct" :
>
> {code = MEM, mode = BLKmode, jump = 0, call = 1, unchanging = 0,
> volatil = 0, in_struct = 1, used = 0, frame_related = 0, return_val =
> 0, u = {fld = {{
> rt_int = 144793312, rt_uint = 144793312, rt_str = 0x8a15ee0
> "/", rt_rtx = 0x8a15ee0, rt_rtvec = 0x8a15ee0, rt_type = 144793312,
> rt_addr_diff_vec_flags = {min_align = 224, base_after_vec = 0,
> min_after_vec = 1, max_after_vec = 1, min_after_base = 1,
> max_after_base = 1,
> offset_unsigned = 0, scale = 161}, rt_cselib = 0x8a15ee0,
> rt_bit = 0x8a15ee0, rt_tree = 0x8a15ee0, rt_bb = 0x8a15ee0, rt_mem =
> 0x8a15ee0,
> rt_reg = 0x8a15ee0, rt_constant = 0x8a15ee0}}, hwint =
> {144793312}, block_sym = {fld = {{rt_int = 144793312, rt_uint =
> 144793312,
> rt_str = 0x8a15ee0 "/", rt_rtx = 0x8a15ee0, rt_rtvec =
> 0x8a15ee0, rt_type = 144793312, rt_addr_diff_vec_flags = {min_align =
> 224,
> base_after_vec = 0, min_after_vec = 1, max_after_vec = 1,
> min_after_base = 1, max_after_base = 1, offset_unsigned = 0, scale =
> 161},
> rt_cselib = 0x8a15ee0, rt_bit = 0x8a15ee0, rt_tree =
> 0x8a15ee0, rt_bb = 0x8a15ee0, rt_mem = 0x8a15ee0, rt_reg = 0x8a15ee0,
> rt_constant = 0x8a15ee0}, {rt_int = 144804576, rt_uint =
> 144804576, rt_str = 0x8a18ae0 "\002", rt_rtx = 0x8a18ae0, rt_rtvec =
> 0x8a18ae0,
> rt_type = 144804576, rt_addr_diff_vec_flags = {min_align =
> 224, base_after_vec = 0, min_after_vec = 1, max_after_vec = 0,
> min_after_base = 1,
> max_after_base = 0, offset_unsigned = 0, scale = 161},
> rt_cselib = 0x8a18ae0, rt_bit = 0x8a18ae0, rt_tree = 0x8a18ae0, rt_bb
> = 0x8a18ae0,
> rt_mem = 0x8a18ae0, rt_reg = 0x8a18ae0, rt_constant =
> 0x8a18ae0}, {rt_int = 0, rt_uint = 0, rt_str = 0x0, rt_rtx = 0x0,
> rt_rtvec = 0x0,
> rt_type = VOIDmode, rt_addr_diff_vec_flags = {min_align = 0,
> base_after_vec = 0, min_after_vec = 0, max_after_vec = 0,
> min_after_base = 0,
> max_after_base = 0, offset_unsigned = 0, scale = 0},
> rt_cselib = 0x0, rt_bit = 0x0, rt_tree = 0x0, rt_bb = 0x0, rt_mem =
> 0x0, rt_reg = 0x0,
> rt_constant = 0x0}}, block = 0x9002f, offset = 143271360},
> rv = {cl = 0, decimal = 0, sign = 0, signalling = 0, canonical = 1,
> uexp = 2262395,
> sig = {144804576, 0, 589871}}, fv = {data = {low = 144793312,
> high = 144804576}, mode = 0}}}
>
>
> Here its XEXP:
>
> {code = 24288, mode = 161, jump = 0, call = 0, unchanging = 0, volatil
> = 1, in_struct = 0, used = 0, frame_related = 0, return_val = 0, u =
> {fld = {{
> rt_int = 144804576, rt_uint = 144804576, rt_str = 0x8a18ae0
> "\002", rt_rtx = 0x8a18ae0, rt_rtvec = 0x8a18ae0, rt_type = 144804576,
> rt_addr_diff_vec_flags = {min_align = 224, base_after_vec = 0,
> min_after_vec = 1, max_after_vec = 0, min_after_base = 1,
> max_after_base = 0,
> offset_unsigned = 0, scale = 161}, rt_cselib = 0x8a18ae0,
> rt_bit = 0x8a18ae0, rt_tree = 0x8a18ae0, rt_bb = 0x8a18ae0, rt_mem =
> 0x8a18ae0,
> rt_reg = 0x8a18ae0, rt_constant = 0x8a18ae0}}, hwint =
> {144804576}, block_sym = {fld = {{rt_int = 144804576, rt_uint =
> 144804576,
> rt_str = 0x8a18ae0 "\002", rt_rtx = 0x8a18ae0, rt_rtvec =
> 0x8a18ae0, rt_type = 144804576, rt_addr_diff_vec_flags = {min_align =
> 224,
> base_after_vec = 0, min_after_vec = 1, max_after_vec = 0,
> min_after_base = 1, max_after_base = 0, offset_unsigned = 0, scale =
> 161},
> rt_cselib = 0x8a18ae0, rt_bit = 0x8a18ae0, rt_tree =
> 0x8a18ae0, rt_bb = 0x8a18ae0, rt_mem = 0x8a18ae0, rt_reg = 0x8a18ae0,
> rt_constant = 0x8a18ae0}, {rt_int = 0, rt_uint = 0, rt_str =
> 0x0, rt_rtx = 0x0, rt_rtvec = 0x0, rt_type = VOIDmode,
> rt_addr_diff_vec_flags = {
> min_align = 0, base_after_vec = 0, min_after_vec = 0,
> max_after_vec = 0, min_after_base = 0, max_after_base = 0,
> offset_unsigned = 0,
> scale = 0}, rt_cselib = 0x0, rt_bit = 0x0, rt_tree = 0x0,
> rt_bb = 0x0, rt_mem = 0x0, rt_reg = 0x0, rt_constant = 0x0}, {rt_int =
> 589871,
> rt_uint = 589871, rt_str = 0x9002f <Address 0x9002f out of
> bounds>, rt_rtx = 0x9002f, rt_rtvec = 0x9002f, rt_type = 589871,
> rt_addr_diff_vec_flags = {min_align = 47, base_after_vec =
> 0, min_after_vec = 0, max_after_vec = 0, min_after_base = 0,
> max_after_base = 0,
> offset_unsigned = 0, scale = 9}, rt_cselib = 0x9002f,
> rt_bit = 0x9002f, rt_tree = 0x9002f, rt_bb = 0x9002f, rt_mem =
> 0x9002f, rt_reg = 0x9002f,
> rt_constant = 0x9002f}}, block = 0x88a25c0, offset =
> 143266688}, rv = {cl = 0, decimal = 0, sign = 0, signalling = 0,
> canonical = 1,
> uexp = 2262571, sig = {0, 589871, 143271360}}, fv = {data = {low
> = 144804576, high = 0}, mode = 589871}}}
>
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