Back end question.

Thu Apr 28 15:46:00 GMT 2011

Hello Ian.
But is there a chance that between a rtl generation and splitting an insn, a compiler could use that clobbered CC reg in some of intermediate phases, but after a register allocation it turns out that there shouldn't be any clobber at all?
Thanks.
Dmitry.

--- Г€Г±ГµГ®Г¤ГГ®ГҐ Г±Г®Г®ГЎГ№ГҐГГЁГҐ ---
 ГЋГІ ГЄГ®ГЈГ®: "Ian Lance Taylor" <iant@google.com> 
 ГЉГ®Г¬Гі: "Dmitry" <mittie@ukr.net> 
 Г„Г ГІГ : 28 Г ГЇГ°ГҐГ«Гї 2011, 17:15:20 
 Г’ГҐГ¬Г : Re: Back end question. 

> "Dmitry" <mittie@ukr.net> writes:
> 
> > I'm currently writing a GCC back end for a custom architecture. And I
> > have a RTL related question. If I am, for example, writing an
> > implementation for "movhi" insn, and depending on a register class of
> > the destination operand it could include a condition code register
> > change. How can I write a right implementation for such case? If I use
> > "define_expand" RTX destination registers are not allocated yet so
> > they could be any pseudo registers. So I can not determine the class
> > of that registers during RTL generation phase. Should I use
> > "define_split" additionally to analyze operand's register class after
> > reload phase? Or maybe there's other way?
> 
> I think you'll have to clobber the conditional code register in the
> initial insn, and use a define_split to remove the clobber (or perhaps
> change it to a set when appropriate) after register allocation is
> complete.
> 
> Ian
> 
> 