Question about flushing registers to memory in locks

[Ian Lance Taylor]

AndyCh <sledge76@hotmail.com> writes:

> Short Question:
> I have a question about how GCC flushes register values to memory in locks.

Short answer: it doesn't.  gcc does not know anything special about
locks.  What is knows is that it can not move memory reads and writes
across uses of "asm volatile" that clobber memory.  The actual lock
implementation is responsible for issuing the appropriate fence
instructions.

That said, the builtin function __sync_synchronize can help.


> // example2.c
> TM_BEGIN();
> g_var++;
> TM_END();
> Those TM_BEGIN() and TM_END() macros are nothing but reserved assembly
> instruction telling the hardware to isolate and atomicize accesses between
> TM_BEGIN() and TM_END().
> The problem is that GCC doesn't recognize the critical section as critical
> section and it does not read fresh nor flush before TM_END().

If those TM_BEGIN and TM_END instructions are properly "asm volatile"
instruction with an explicit memory clobber, and if g_var is a global
variable, then gcc will ensure that the change to g_var occurs between
TM_BEGIN and TM_END.  Everything else is the responsibility of the
macros.

Ian