About Conditional Execution Pattern
Ian Lance Taylor
iant@google.com
Fri Oct 2 08:13:00 GMT 2009
kito <npickito@gmail.com> writes:
> I have some question about Conditional Execution Pattern.
> In fact, I want to remove Conditional Execution in ARM for experimentation.
> I have remove lots of Conditional Execution Pattern from arm.md
> But I see a RTX that I can't understand.
>
> @(insn 74 79 80 ../../../gcc-live/libgcc/../gcc/libgcc2.c:1848 (set
> (reg:QI 18 r18 [320])
> @ (const_int 1 [0x1])) 169 {*arm_movqi_insn}
> (expr_list:REG_EQUAL (const_int 1 [0x1])
> @ (nil)))
> mov r18, #1 @ 74 *arm_movqi_insn/1 [length = 4]
> @(jump_insn 80 74 729 ../../../gcc-live/libgcc/../gcc/libgcc2.c:1848 (set (pc)
> @ (if_then_else (ne (reg:CC 40 cc)
> @ (const_int 0 [0x0]))
> @ (label_ref 83)
> @ (pc))) 220 {*arm_cond_branch} (expr_list:REG_DEAD (reg:CC 40 cc)
> @ (expr_list:REG_BR_PROB (const_int 5000 [0x1388])
> @ (nil)))
> -> 83)
> @(insn 82 729 83 ../../../gcc-live/libgcc/../gcc/libgcc2.c:1848 (set
> (reg:QI 18 r18 [320])
> @ (const_int 0 [0x0])) 169 {*arm_movqi_insn}
> (expr_list:REG_EQUAL (const_int 0 [0x0])
> @ (nil)))
> moveq r18, #0 @ 82 *arm_movqi_insn/1 [length = 4]
>
> I don't know the expr_list:REG_EQUAL is how to generate, I have seem
> it in expand pass.
I'm not sure what your actual question is. REG_EQUAL is documented in
the internals manual and in reg-notes.def.
Ian
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