instruction ordering

[marian]

I have used the -mcpu=405 and 440 in trials to see what the assembly
looks like and in both cases it does differ from the commercial variant.
The differences are generally inversions of 2-3 instructions.

Such as this function call start from GCC,
stwu 1,-32(1) 
mflr 0 

In the commercial variant it looks like this,
mflr 0 
stwu 1,-32(1) 

The Power PC is sensitive to instruction ordering as it can do a fetches
while executing instructions already in the pipeline. The vendor has
speed data showing quite a large gap over GCC in testing, which is also
our experience.


On Thu, 2009-05-07 at 06:43 -0700, John (Eljay) Love-Jensen wrote:
> Hi marian,
> 
> > My question has the assembly ordering for the 405 and 440 been
> > optimised?
> 
> I presume you are using GCC 4.4.0, since you did not specify.
> 
> When you use the GCC compiler, are you using the -mtune flag to specify
> which CPU you want to optimize for?
> 
> Sincerely,
> --Eljay
>