moving data between x87 and xmm registers

[Tim Prince]

Gautam Sewani wrote:
> That is very bad news indeed :-( .
> Can anyone confirm this with some testing? (I am using a Core duo, and
> don't have access to Core 2 Duo.)
> Regards
> Gautam
> On Thu, Jun 5, 2008 at 7:26 PM, Frédéric Bastien <nouiz@nouiz.org> wrote:
>> Hi,
>>
>> With processor before core2 from intel, their was a bottleneck in the
>> CPU that make all sse instruction being split in two. So as you have
>> only two double in a sse instruction and if you have a processor with
>> such a bottleneck, I see only 1 way to have a speed up. Use float
>> instead of double. I know, this is not always an option. To my
>> knowledge prescott cpu have this bottleneck.

bad mix of top and bottom posting, some elided

I don't see how this relates to the beginning of the thread.  It's true 
that some CPUs in the past (pentium-m, AMD before Barcelona) always split 
128-bit operands into 2 64-bit operands.  This doesn't mean you should 
avoid parallel SSE2, although it may reinforce the point that you should 
consider whether you are going about your task the best way.