Curious global variable bug? Bad assumptions on my part?

[Matthew Woehlke]

Eljay Love-Jensen wrote:
> Hi Matthew,
> 
>> Huh? I thought SMP hardware is required to be responsible for cache
>> syncing in such an instance...
> 
> No.  Alas.  Perhaps on some SMP hardware, but not all.

Huh. I'm pretty sure I read about Intel chips doing exactly this. A list 
of what architectures do or do not provide cache synchronization would 
be interesting.

> For the hardware I used, which definitely did not have that feature, that's
> why the pthread library emitted a memory barrier around the mutex:  to
> ensure the caches are synchronized.

Bleh. I wonder what percentage of (multithreaded, at least) software has 
subtle bugs from exactly this, because I'm sure it's very large.

-- 
Matthew
Thus sang the fat lady...