insn does not satisfy its constraints
Boris Boesler
baembel@gmx.de
Sat Oct 6 14:52:00 GMT 2007
Hi!
Am 05.10.2007 um 21:48 schrieb Rask Ingemann Lambertsen:
>> *** 66? This is impossible!! There is no register set that contains
>> that register!
> Stack, frame or argument pointer?
No, they are address registers and they are FIXED, that' why they
are not in register sets Ax.
> You should have a class which is the union of the Rx and Ax
> classes,
> placed somewhere between Ax and GENERAL. If you have instructions
> which take
> both Rx and Ax, define a constraint for this new class.
Basically, such a class exist, but not used. But even if I change
such a class nothing changes.
> Is your REGNO_REG_CLASS() correct?
Yes.
>> *** Why was this movsi instruction (insn 21) inserted? It should move
>> R0 to an address register.
>
> The reload pass inserted insn 21 (this is the "Reload 0" above)
> before
> insn 8 because it found that register R0 was no good for the
> address in insn
> 8. Unfortunately, it picked R2 which isn't any good either.
But that's what BASE_REG_CLASS id for.
>> There seems to be a problem with my mov<mode> instruction?
>> ...
> Replace the first four alternatives with just one using the
> combined
> Rx+Ax class from above. Better yet, since the fifth alternative r-
> >r should
> cover it and the instruction is the same, try deleting the first four
> alternatives.
There is no r->r, but I replaced all Rx / Ax alternatives by r: no
change!
> What is your REGISTER_MOVE_COST? Just wondering.
// Macro: REGISTER_MOVE_COST (MODE, FROM, TO)
#define REGISTER_MOVE_COST(MODE, FROM, TO) 1
// Macro: MEMORY_MOVE_COST (MODE, CLASS, IN)
#define MEMORY_MOVE_COST(MODE, CLASS, IN) 2
// Macro: BRANCH_COST
#define BRANCH_COST 2
Thanks,
Boris
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