Targetting strange CPU architecture

[Mark B]

I have a virtual CPU architecture set up that is rather strange. It
has similar commands to the x86 architecture, but every registry
memory location is 1 'byte' each byte is really a 32 bit floating
point number. So if you go

mov [345], 1
mov [346], 2e99

this moves the floating point number 1.0 into memory location 345, and
floating point number 2e99 into memory location 346, even though these
are 32 bit floats and each address is only 1 'byte'. Get it? I was
wondering if it would be possible to write a gcc backend for this kind
of cpu. I was under the impression that the backend had to have RTLs
for at least mov instructions for QImode and SFmode... is it possible
to have everything run in a single mode that is floating point?

Thanks,

Mark