GCC problems with Altivec / PowerPC
David Edelsohn
dje@watson.ibm.com
Tue Jul 3 21:40:00 GMT 2007
As a workaround I tried to use inline assembly for loads and stores:
#define asm_lvx( vec, idx, ptr ) \
asm ( "lvx %0,%1,%2" \
: "=v" (vec) \
: "r" (idx), "r" (ptr)
)
But there's a problem, in lvx/stvx '0' in second term acts as
literal 0, not as register number. Shouldn't gcc be able to
understand those instructions and not use r0 ?
Constraint letter "r" means any GPR. If you are going to create the
address manually, you explicitly need to tell GCC only to use a base
register by using constraint letter "b".
The extra stack manipulation is a known problem.
For the memcpy look, open a Bugzilla.
David
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