adding movz to machine description

Petar Bajic petar.bajic@micronasnit.com
Tue Jul 25 14:10:00 GMT 2006


> That means that the combine pass has replaced it with something else
> which is equivalent which the combine pass thought would be cheaper.
> Look at the generated RTL to see what it turned into.  If the
> resulting code is less efficient to run, then you need to adjust your
> costs (the TARGET_RTX_COSTS hook).
>
> Ian

Finally, my instruction is generated.
There is off course one problem, when If Then Else is replaced with my 
pattern,

(define_expand "movsicc"
    [(set (match_operand:SI 0 "register_operand" "=d,d")
     (if_then_else:SI
       ;;(match_operator 1 "comparison_operator" [(match_operand:SI 3 
"register_operand" "=d,d") (const_int 0)])
       (eq:SI (match_operand:SI 1 "register_operand" "=d,d") (const_int 0))
        (match_operand:SI 2 "register_operand" "=d,d")
 (match_dup:SI 0)))]
  ""
  "
{
  dlx_compare_op0 = force_reg(SImode, dlx_compare_op0);
  emit_insn(gen_movsicc_movz(operands[0], , dlx_compare_op0, operands[2], , 
operands[0], ));
  DONE;
}")

previous initialization of destination register is lost.
for example,
d = 7;
if (a > b)
 d = in1;
return d;

obviously, d should remain 7 if condition is not true.

pattern is replaced with


(insn 50 18 51 0 (set (reg:SI 47)
        (const_int 7 [0x7])) 40 {movsi_general} (nil)         ////this use 
to be d = 7;
    (nil))

(insn 51 50 33 0 (set (reg/v:SI 37 [ d ])
        (if_then_else:SI (reg:SI 45)
            (reg/v:SI 42 [ h ])
            (reg/v:SI 37 [ d ]))) 0 {movsicc_movz} (nil)       //// now d is 
not initialised??
    (nil))


and in next step, insn 50 is removed!
How come else branch got hanging like that? 



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