Help with GCC

Balaji V. Iyer
Tue Aug 16 06:38:00 GMT 2005

Hello Everyone,
    Greetings! I apologize ahead for asking an non-specific question. I
have a question about the liveness analysis. This is what I wanted to

I want to check to see if an instruction is live after a certain number of
stage. (eg. 3 cycles)

if (INSN is not live for more than 3 cycles)
   Mark it as "not_live" (NOT the same place as dead code marking)
   Mark it as "live"

Pass this "live/not-live" flag to the register allocation process so that
it can output instruction in such a way (please see example below) (I want
this information to be passed into .md stage)

if (live)
  print " r1,r2,r3"
   print "add.notlive r1,r2,r3"

I would also like to do it on the OpenRISC processor. Also, would like to
NOT change the GCC sources as much as I can.

I would appreciate if anyone could point me in the right direction to go
about doing this.

Thanking You,

Yours Sincerely,

Balaji V. Iyer.

PS. CC's greatly appreciated.

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