ELF instruction for section and branch.

[Gagneet Singh]

MAIL:
-----

We have been analyzing the information you had sent, regarding:

> It sounds like you're asking about code such as:
> 
>         .section .text1
> foo:    b        bar
> 
>         .section .text2
> bar:
>
> Is that right?  If so, then no, this isn't supported.  The
> assembler can't calculate the branch offset because the 
> distance between foo and bar isn't known until link time.  
> And unfortunately, due to an infamous problem with the MIPS 
> ELF spec, there's no relocation that the assembler can use either.
> 
> (The R_MIPS_PC16 relocation was probably designed for
> branches, but the ELF spec says it gives a byte offset, 
> whereas branch instructions need a word offset.)


We have come to a conclusion that if we branch to a label local to the
section in which the branch is invoked and then jump to the desired
location in the other section it should solve the problem. 

	.section .text1
foo:	
	b	L1

L1:
	j	bar


	.section .text2
bar:
	add	r4, r5, r6


Are we correct in assuming this?






> -----Original Message-----
> From: Richard Sandiford [mailto:rsandifo@redhat.com] 
> Sent: Friday, 19 December, 2003 20:34 PM
> To: gagneet@acmet.com
> Cc: gcc-help@gcc.gnu.org; gcc@gcc.gnu.org
> Subject: Re: ELF instruction for section and branch.
> 
> 
> "Gagneet Singh" <gagneet@acmet.com> writes:
> > I wish to enquire what is the equivalent for a assembly language 
> > section in the GCC ELF format?
> 
> I'm not quite sure what you mean here, but...
> 
> > Also, we have a problem of getting the output in ELF format where a 
> > branch instruction is accessing a label in the second section.
> >
> > Is this possible?
> 
> It sounds like you're asking about code such as:
> 
>         .section .text1
> foo:    b        bar
> 
>         .section .text2
> bar:
> 
> Is that right?  If so, then no, this isn't supported.  The 
> assembler can't calculate the branch offset because the 
> distance between foo and bar isn't known until link time.  
> And unfortunately, due to an infamous problem with the MIPS 
> ELF spec, there's no relocation that the assembler can use either.
> 
> (The R_MIPS_PC16 relocation was probably designed for 
> branches, but the ELF spec says it gives a byte offset, 
> whereas branch instructions need a word offset.)
> 
> Richard
>