Template
Matthias Oltmanns
Mathias.Oltmanns.Oltmanns@sysde.eads.net
Tue Apr 8 08:10:00 GMT 2003
Am Mon, 2003-04-07 um 15.18 schrieb Eduardo Cesar Cabrera Flores:
> >
> > i'm not sure if you asking for "How to write a makefile". If so i would
> > suggest to read first info-pages via "info make".
>
> nop, i've already known how to do that!
Ok.
>
> If i got a lot of sources definition files (.C or .cc or .cpp) some of
> them are template definitions and some aren't. i have to compile with "-c"
> option those files that do not have any template, and then link all
> together with the second phase?
>
> v.gr.
> Main.C Base.C Base.h Derived.C Derived.h Derived2.C Derived2.h
> Template.C Template.h Template2.C Template2.h
>
> How do i compile with a makefile to only compile those files that were
> modified & not to compile the whole project properly with a makefile?
>
I'm sure there are many ways to solve this.
One of them i would go is:
# Your main executable depends on the following source files
SRC = Main.C Base.C Derived.C Derived2.C
OBJ = $(SRC:.C=.o)
# your main target
all : $(OBJ)
$(LINK.cc) -o <name_of_exe> $+ $(LIBS)
# how to compile
%.o: %.C
$(COMPILE.cc) $(CPPINCLUDES) -o $@ $<
## make dependencies based on header files
DEPFILE = Makefile.dep
DEPEND.cc = $(filter-out -c, $(COMPILE.cc)) -MM -MG
depend.removed:
-@$(RM) -r $(DEPFILE)
depend.%o: %.C
@$(DEPEND.cc) $(CPPINCLUDES) -o $(subst depend.,,$@) $< >> $(DEPFILE)
depend: depend.removed $(addprefix depend., $(OBJ))
-include $(DEPFILE)
hope that helps
cu
Matthias
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