[gcc(refs/users/meissner/heads/work251-dmf)] Use vector pair load/store for memcpy with -mcpu=future

[Michael Meissner]

https://gcc.gnu.org/g:3823dd5aa50a8462fbb4d2104475bb0889739308

commit 3823dd5aa50a8462fbb4d2104475bb0889739308
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Sat Jul 18 03:01:52 2026 -0400

    Use vector pair load/store for memcpy with -mcpu=future
    
    In the development for the power10 processor, GCC did not enable using the load
    vector pair and store vector pair instructions when optimizing things like
    memory copy.  This patch enables using those instructions if -mcpu=future is
    used.
    
    I have committed all of the patches in my backlog (dense math registers, other
    -mcpu=future instructions, random bug fixes, support for _Float16 and
    __bfloat16, and optimizations for vector logical operations on power10/power11)
    into the IBM vendor branch:
    
            vendors/ibm/gcc-17-future
    
    I have tested these patches on both big endian and little endian PowerPC
    servers, with no regressions.  Can I check these patchs into the trunk?
    
    2026-07-18  Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000-cpus.def (FUTURE_MASKS_SERVER): Enable using load
            vector pair and store vector pair instructions for memory copy
            operations.
            (POWERPC_MASKS): Make the option for enabling using load vector pair and
            store vector pair operations set and reset when the PowerPC processor is
            changed.
            * config/rs6000/rs6000.cc (rs6000_machine_from_flags): Disable
            -mblock-ops-vector-pair from influencing .machine selection.
    
    gcc/testsuite/
    
            * gcc.target/powerpc/future-3.c: New test.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def           | 10 +++++++++-
 gcc/config/rs6000/rs6000.cc                 |  2 +-
 gcc/testsuite/gcc.target/powerpc/future-3.c | 22 ++++++++++++++++++++++
 3 files changed, 32 insertions(+), 2 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 365e0c6899c1..9c9d523f7569 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -83,8 +83,15 @@
 #define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER			\
 			      | OPTION_MASK_POWER11)
 
-/* -mcpu=future flags.  */
+/* -mcpu=future flags.
+
+   During the development of the power10 support for GCC, using load/store
+   vector pair instructions for string operations was turned off by default,
+   because there was a use case that had really bad performance.  Assume this
+   will be fixed in potential future machines.  */
+
 #define FUTURE_MASKS_SERVER	(POWER11_MASKS_SERVER			\
+				 | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR	\
 				 | OPTION_MASK_FUTURE			\
 				 | OPTION_MASK_DMF)
 
@@ -116,6 +123,7 @@
 
 /* Mask of all options to set the default isa flags based on -mcpu=<xxx>.  */
 #define POWERPC_MASKS		(OPTION_MASK_ALTIVEC			\
+				 | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR	\
 				 | OPTION_MASK_CMPB			\
 				 | OPTION_MASK_CRYPTO			\
 				 | OPTION_MASK_DFP			\
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 05526693c600..a234bf564d81 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5993,7 +5993,7 @@ rs6000_machine_from_flags (void)
 
   /* Disable the flags that should never influence the .machine selection.  */
   flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
-	     | OPTION_MASK_ALTIVEC);
+	     | OPTION_MASK_ALTIVEC | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR);
 
   if ((flags & (FUTURE_MASKS_SERVER & ~POWER11_MASKS_SERVER)) != 0)
     return "future";
diff --git a/gcc/testsuite/gcc.target/powerpc/future-3.c b/gcc/testsuite/gcc.target/powerpc/future-3.c
new file mode 100644
index 000000000000..afa22228b96d
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/future-3.c
@@ -0,0 +1,22 @@
+/* 32-bit doesn't generate vector pair instructions.  */
+/* { dg-do compile { target lp64 } } */
+/* { dg-options "-mdejagnu-cpu=future -O2" } */
+
+/* Test to see that memcpy will use load/store vector pair with
+   -mcpu=future.  */
+
+#ifndef SIZE
+#define SIZE 4
+#endif
+
+extern vector double to[SIZE], from[SIZE];
+
+void
+copy (void)
+{
+  __builtin_memcpy (to, from, sizeof (to));
+  return;
+}
+
+/* { dg-final { scan-assembler {\mlxvpx?\M}  } } */
+/* { dg-final { scan-assembler {\mstxvpx?\M} } } */