[gcc(refs/users/meissner/heads/work222)] Remove internal -mpower11 support.

[Michael Meissner]

https://gcc.gnu.org/g:87d1c3a1938717308df69618f1810038ca2b1dfd

commit 87d1c3a1938717308df69618f1810038ca2b1dfd
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Sun Sep 21 16:38:15 2025 -0400

    Remove internal -mpower11 support.
    
    2025-09-21  Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config/rs6000/rs6000-cpus.def (POWER11_MASKS_SERVER): Drop -mpower11
            ISA option.
            (POWERPC_MASKS): Likewise.
            * config/rs6000/rs6000.cc (rs6000_opt_masks): Likewise.
            * config/rs6000/rs6000.h (TARGET_POWER11): New macro.
            * config/rs6000/rs6000.opt (-mpower11): Drop power11 from being an ISA
            option.

Diff:
---
 gcc/config/rs6000/rs6000-cpus.def | 4 +---
 gcc/config/rs6000/rs6000.cc       | 1 -
 gcc/config/rs6000/rs6000.h        | 2 ++
 gcc/config/rs6000/rs6000.opt      | 5 +----
 4 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 6a4686a0a154..3102d88525bb 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -122,8 +122,7 @@
 				 | OPTION_MASK_POWER10			\
 				 | OTHER_POWER10_MASKS)
 
-#define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER			\
-			      | OPTION_MASK_POWER11)
+#define POWER11_MASKS_SERVER	ISA_3_1_MASKS_SERVER
 
 /* At the moment, do not define any addition -m<xxx> arguments for -mcpu=future
    support.  */
@@ -166,7 +165,6 @@
 				 | OPTION_MASK_FLOAT128_KEYWORD		\
 				 | OPTION_MASK_FPRND			\
 				 | OPTION_MASK_POWER10			\
-				 | OPTION_MASK_POWER11			\
 				 | OPTION_MASK_P10_FUSION		\
 				 | OPTION_MASK_HTM			\
 				 | OPTION_MASK_ISEL			\
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 76a0f7d3978c..5daca441c71a 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -24482,7 +24482,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128-hardware",	OPTION_MASK_FLOAT128_HW,	false, true  },
   { "fprnd",			OPTION_MASK_FPRND,		false, true  },
   { "power10",			OPTION_MASK_POWER10,		false, true  },
-  { "power11",			OPTION_MASK_POWER11,		false, false },
   { "hard-dfp",			OPTION_MASK_DFP,		false, true  },
   { "htm",			OPTION_MASK_HTM,		false, true  },
   { "isel",			OPTION_MASK_ISEL,		false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index bcee3e025822..78c674b1e05d 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=<xxx>, but that do not have an associated
    switch with the option.  */
+#define TARGET_POWER11							\
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 #define TARGET_FUTURE							\
   ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0)
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 7c9602e68211..fb323beff9b4 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -598,11 +598,8 @@ Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
 mpower10
 Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
 
-;; Users should not use -mpower11, but we need to use a bit to identify when
-;; the user changes the default cpu via  #pragma GCC target("cpu=power11")
-;; and then resets it later.
 mpower11
-Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented WarnRemoved
 
 mprefixed
 Target Mask(PREFIXED) Var(rs6000_isa_flags)