[gcc(refs/users/meissner/heads/work222)] Revert changes
Michael Meissner
meissner@gcc.gnu.org
Sun Sep 21 20:24:42 GMT 2025
https://gcc.gnu.org/g:53a302b36794540f27dea168a23af097d6280ac5
commit 53a302b36794540f27dea168a23af097d6280ac5
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Sun Sep 21 16:24:37 2025 -0400
Revert changes
Diff:
---
gcc/config.gcc | 4 +-
gcc/config/rs6000/aix71.h | 3 -
gcc/config/rs6000/aix72.h | 3 -
gcc/config/rs6000/aix73.h | 3 -
gcc/config/rs6000/default64.h | 2 -
gcc/config/rs6000/driver-rs6000.cc | 2 -
gcc/config/rs6000/rs6000-c.cc | 26 ++---
gcc/config/rs6000/rs6000-cpus.def | 146 ++++--------------------
gcc/config/rs6000/rs6000-protos.h | 5 +-
gcc/config/rs6000/rs6000-tables.opt | 11 +-
gcc/config/rs6000/rs6000.cc | 168 ++++++++--------------------
gcc/config/rs6000/rs6000.h | 10 --
gcc/config/rs6000/rs6000.opt | 16 +--
gcc/testsuite/gcc.target/powerpc/future-1.c | 13 ---
gcc/testsuite/gcc.target/powerpc/future-2.c | 24 ----
15 files changed, 94 insertions(+), 342 deletions(-)
diff --git a/gcc/config.gcc b/gcc/config.gcc
index 5fee641d5aef..7c2f5bed8f6a 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -533,7 +533,7 @@ powerpc*-*-*)
extra_headers="${extra_headers} ppu_intrinsics.h spu2vmx.h vec_types.h si2vmx.h"
extra_headers="${extra_headers} amo.h"
case x$with_cpu in
- xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500|xfuture)
+ xpowerpc64|xdefault64|x6[23]0|x970|xG5|xpower[3456789]|xpower1[01]|xpower6x|xrs64a|xcell|xa2|xe500mc64|xe5500|xe6500)
cpu_is_64bit=yes
;;
esac
@@ -5711,7 +5711,7 @@ case "${target}" in
tm_defines="${tm_defines} CONFIG_PPC405CR"
eval "with_$which=405"
;;
- "" | common | native | future \
+ "" | common | native \
| power[3456789] | power1[01] | power5+ | power6x \
| powerpc | powerpc64 | powerpc64le \
| rs64 \
diff --git a/gcc/config/rs6000/aix71.h b/gcc/config/rs6000/aix71.h
index 7c437be201ec..2b21dd7cd1e0 100644
--- a/gcc/config/rs6000/aix71.h
+++ b/gcc/config/rs6000/aix71.h
@@ -79,7 +79,6 @@ do { \
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
- mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
@@ -134,10 +133,8 @@ do { \
%{pthread: -D_THREAD_SAFE}"
#define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
#include "rs6000-cpus.def"
#undef RS6000_CPU
-#undef RS6000_CPU_OPTION
#undef TARGET_DEFAULT
#ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix72.h b/gcc/config/rs6000/aix72.h
index bab23491debc..53c0bde5ad4a 100644
--- a/gcc/config/rs6000/aix72.h
+++ b/gcc/config/rs6000/aix72.h
@@ -79,7 +79,6 @@ do { \
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
- mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
@@ -135,10 +134,8 @@ do { \
%{pthread: -D_THREAD_SAFE}"
#define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
#include "rs6000-cpus.def"
#undef RS6000_CPU
-#undef RS6000_CPU_OPTION
#undef TARGET_DEFAULT
#ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/aix73.h b/gcc/config/rs6000/aix73.h
index bcf236665604..c7639368a264 100644
--- a/gcc/config/rs6000/aix73.h
+++ b/gcc/config/rs6000/aix73.h
@@ -79,7 +79,6 @@ do { \
#undef ASM_CPU_SPEC
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
- mcpu=future: -mfuture; \
mcpu=power11: -mpwr11; \
mcpu=power10: -mpwr10; \
mcpu=power9: -mpwr9; \
@@ -136,10 +135,8 @@ do { \
%{pthread: -D_THREAD_SAFE}"
#define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
#include "rs6000-cpus.def"
#undef RS6000_CPU
-#undef RS6000_CPU_OPTION
#undef TARGET_DEFAULT
#ifdef RS6000_BI_ARCH
diff --git a/gcc/config/rs6000/default64.h b/gcc/config/rs6000/default64.h
index d289c6dfd6d8..7f6001ded852 100644
--- a/gcc/config/rs6000/default64.h
+++ b/gcc/config/rs6000/default64.h
@@ -19,10 +19,8 @@ along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
#define RS6000_CPU(NAME, CPU, FLAGS)
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION)
#include "rs6000-cpus.def"
#undef RS6000_CPU
-#undef RS6000_CPU_OPTION
#if (TARGET_DEFAULT & MASK_LITTLE_ENDIAN)
#undef TARGET_DEFAULT
diff --git a/gcc/config/rs6000/driver-rs6000.cc b/gcc/config/rs6000/driver-rs6000.cc
index cacf25e9dfa4..2ab675e6d042 100644
--- a/gcc/config/rs6000/driver-rs6000.cc
+++ b/gcc/config/rs6000/driver-rs6000.cc
@@ -45,10 +45,8 @@ along with GCC; see the file COPYING3. If not see
static const char *rs6000_supported_cpu_names[] =
{
#define RS6000_CPU(NAME, CPU, FLAGS) NAME,
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION) NAME,
#include "rs6000-cpus.def"
#undef RS6000_CPU
-#undef RS6000_CPU_OPTION
};
/* This table holds a list of cpus where their Linux AT_PLATFORM name differs
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 70e6d4b1e6db..d3b0a5668212 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -338,16 +338,13 @@ rs6000_define_or_undefine_macro (bool define_p, const char *name)
#pragma GCC target, we need to adjust the macros dynamically. */
void
-rs6000_target_modify_macros (bool define_p,
- HOST_WIDE_INT flags,
- HOST_WIDE_INT cpu_option)
+rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags)
{
if (TARGET_DEBUG_BUILTIN || TARGET_DEBUG_TARGET)
fprintf (stderr,
- "rs6000_target_modify_macros (%s, "
- HOST_WIDE_INT_PRINT_HEX ", " HOST_WIDE_INT_PRINT_HEX ")\n",
+ "rs6000_target_modify_macros (%s, " HOST_WIDE_INT_PRINT_HEX ")\n",
(define_p) ? "define" : "undef",
- flags, cpu_option);
+ flags);
/* Each of the flags mentioned below controls whether certain
preprocessor macros will be automatically defined when
@@ -428,20 +425,18 @@ rs6000_target_modify_macros (bool define_p,
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5");
if ((flags & OPTION_MASK_FPRND) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR5X");
- if ((cpu_option & CPU_OPTION_POWER6_MASK) != 0)
+ if ((flags & OPTION_MASK_CMPB) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR6");
- if ((cpu_option & CPU_OPTION_POWER7_MASK) != 0)
+ if ((flags & OPTION_MASK_POPCNTD) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR7");
- if ((cpu_option & CPU_OPTION_POWER8_MASK) != 0)
+ if ((flags & OPTION_MASK_POWER8) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR8");
- if ((cpu_option & CPU_OPTION_POWER9_MASK) != 0)
+ if ((flags & OPTION_MASK_MODULO) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
- if ((cpu_option & CPU_OPTION_POWER10_MASK) != 0)
+ if ((flags & OPTION_MASK_POWER10) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
- if ((cpu_option & CPU_OPTION_POWER11_MASK) != 0)
+ if ((flags & OPTION_MASK_POWER11) != 0)
rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
- if ((cpu_option & CPU_OPTION_FUTURE_MASK) != 0)
- rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
if ((flags & OPTION_MASK_SOFT_FLOAT) != 0)
rs6000_define_or_undefine_macro (define_p, "_SOFT_FLOAT");
if ((flags & OPTION_MASK_RECIP_PRECISION) != 0)
@@ -610,8 +605,7 @@ void
rs6000_cpu_cpp_builtins (cpp_reader *pfile)
{
/* Define all of the common macros. */
- rs6000_target_modify_macros (true, rs6000_isa_flags,
- rs6000_cpu_option_flags);
+ rs6000_target_modify_macros (true, rs6000_isa_flags);
if (TARGET_FRE)
builtin_define ("__RECIP__");
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 0f7d76457cb9..4a1037616d7f 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -18,48 +18,6 @@
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-/* There are two different ISA/CPU options.
-
- Historically, the PowerPC port has used the ISA flags. These flags are set
- up based on -m<options> set in rs6000.opt. There are two HOST_WIDE_INT
- variables for these options:
-
- rs6000_isa_flags: These are the current named ISA options that are set
- for the current build.
-
- rs6000_isa_flags_explicit: These are the current name ISA options that
- were used by the user on the command line.
-
- However, the problem with the ISA bits is that you must have a named -m
- option that the user can use on the command line. For example, the
- -mpopcntd option sets one of the bits for ISA 2.06 features (power7), and
- -mquad-memory-atomic sets one of the bits for ISA 2.07 features (power8).
- In general, we don't want the user to be able to say:
-
- -mcpu=power9 -mno-popcntd -mno-quad-memory-atomic
-
- Instead there are now a parallel set of cpu option bits that are only set
- via the -mcpu=<xxx> option. The user cannot turn these individual cpu
- options on or off via separate -m<xxx> options.
-
- There are ISA options that we want the user to still turn on/off, and these
- options should remain as -m<xxx> options. Some of these options that the
- user should be able disable include:
-
- -mno-altivec
- -mno-vsx
- -mno-mma
- -mno-crypto
- -mno-htm
- -mno-power8-fusion
- -mno-power10-fusion
-
- There are other options historically that were documented as user -m<xxx>
- options, and because they were documented, they need to remain as -m<xxx>
- options at the current time. Perhaps these options can be deprecated and
- removed in future GCC revisions. As these options are removed from GCC,
- these options should be moved from the ISA flags to the cpu flags. */
-
/* ISA masks. */
#ifndef ISA_2_1_MASKS
#define ISA_2_1_MASKS OPTION_MASK_MFCRF
@@ -119,13 +77,11 @@
| OPTION_MASK_PREFIXED)
#define ISA_3_1_MASKS_SERVER (ISA_3_0_MASKS_SERVER \
+ | OPTION_MASK_POWER10 \
| OTHER_POWER10_MASKS)
-#define POWER11_MASKS_SERVER ISA_3_1_MASKS_SERVER
-
-/* At the moment, do not define any addition -m<xxx> arguments for -mcpu=future
- support. */
-#define FUTURE_MASKS_SERVER POWER11_MASKS_SERVER
+#define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER \
+ | OPTION_MASK_POWER11)
/* Flags that need to be turned off if -mno-vsx. */
#define OTHER_VSX_VECTOR_MASKS (OPTION_MASK_EFFICIENT_UNALIGNED_VSX \
@@ -163,6 +119,8 @@
| OPTION_MASK_FLOAT128_HW \
| OPTION_MASK_FLOAT128_KEYWORD \
| OPTION_MASK_FPRND \
+ | OPTION_MASK_POWER10 \
+ | OPTION_MASK_POWER11 \
| OPTION_MASK_P10_FUSION \
| OPTION_MASK_HTM \
| OPTION_MASK_ISEL \
@@ -192,41 +150,7 @@
| OPTION_MASK_STRICT_ALIGN_OPTIONAL \
| OPTION_MASK_VSX)
-
-/* CPU option mask bits that are set only via -mcpu=<xxx> options. */
-/* CPU option mask bits that are set only via -mcpu=<xxx> options. */
-#ifndef CPU_OPTION_POWER6_MASK
-#define CPU_OPTION_POWER6_MASK (HOST_WIDE_INT_1U << 6)
-#define CPU_OPTION_POWER7_MASK (HOST_WIDE_INT_1U << 7)
-#define CPU_OPTION_POWER8_MASK (HOST_WIDE_INT_1U << 8)
-#define CPU_OPTION_POWER9_MASK (HOST_WIDE_INT_1U << 9)
-#define CPU_OPTION_POWER10_MASK (HOST_WIDE_INT_1U << 10)
-#define CPU_OPTION_POWER11_MASK (HOST_WIDE_INT_1U << 11)
-#define CPU_OPTION_FUTURE_MASK (HOST_WIDE_INT_1U << 31)
-
-/* Processor ISA mask bits that are set for each processor. */
-#define CPU_OPTION_POWER6_ALL_MASKS CPU_OPTION_POWER6_MASK
-
-#define CPU_OPTION_POWER7_ALL_MASKS (CPU_OPTION_POWER7_MASK \
- | CPU_OPTION_POWER6_ALL_MASKS)
-
-#define CPU_OPTION_POWER8_ALL_MASKS (CPU_OPTION_POWER8_MASK \
- | CPU_OPTION_POWER7_ALL_MASKS)
-
-#define CPU_OPTION_POWER9_ALL_MASKS (CPU_OPTION_POWER9_MASK \
- | CPU_OPTION_POWER8_ALL_MASKS)
-
-#define CPU_OPTION_POWER10_ALL_MASKS (CPU_OPTION_POWER10_MASK \
- | CPU_OPTION_POWER9_ALL_MASKS)
-
-#define CPU_OPTION_POWER11_ALL_MASKS (CPU_OPTION_POWER11_MASK \
- | CPU_OPTION_POWER10_ALL_MASKS)
-
-#define CPU_OPTION_FUTURE_ALL_MASKS (CPU_OPTION_FUTURE_MASK \
- | CPU_OPTION_POWER11_ALL_MASKS)
-
-#endif /* #ifndef CPU_OPTION_POWER7_MASK. */
-#endif /* #ifndef ISA_2_1_MASKS. */
+#endif
/* This table occasionally claims that a processor does not support a
particular feature even though it does, but the feature is slower than the
@@ -236,15 +160,11 @@
Please keep this list in order, and don't forget to update the documentation
in invoke.texi when adding a new processor or flag.
- Before including this file, define two macros:
+ Before including this file, define a macro:
RS6000_CPU (NAME, CPU, FLAGS)
- RS6000_CPU_OPTION (NAME, CPU, FLAGS, CPU_OPTION)
- where the arguments of RS6000_CPU and RS6000_CPU_OPTION are the fields of
- struct rs6000_ptt. The RS6000_CPU_OPTION's 4th argument is the CPU option
- mask to use for this -mcpu=<xxx> variant, and it is assumed to be 0 for the
- RS6000_CPU macro. */
+ where the arguments are the fields of struct rs6000_ptt. */
RS6000_CPU ("401", PROCESSOR_PPC403, OPTION_MASK_SOFT_FLOAT)
RS6000_CPU ("403", PROCESSOR_PPC403, OPTION_MASK_SOFT_FLOAT | MASK_STRICT_ALIGN)
@@ -314,41 +234,21 @@ RS6000_CPU ("power5", PROCESSOR_POWER5, MASK_POWERPC64 | OPTION_MASK_PPC_GPOPT
RS6000_CPU ("power5+", PROCESSOR_POWER5, MASK_POWERPC64 | OPTION_MASK_PPC_GPOPT
| OPTION_MASK_PPC_GFXOPT | OPTION_MASK_MFCRF | OPTION_MASK_POPCNTB
| OPTION_MASK_FPRND)
-RS6000_CPU_OPTION ("power6", PROCESSOR_POWER6,
- MASK_POWERPC64 | OPTION_MASK_PPC_GPOPT
- | OPTION_MASK_PPC_GFXOPT | OPTION_MASK_MFCRF
- | OPTION_MASK_POPCNTB | OPTION_MASK_FPRND
- | OPTION_MASK_CMPB | OPTION_MASK_DFP
- | OPTION_MASK_RECIP_PRECISION,
- CPU_OPTION_POWER6_ALL_MASKS)
-RS6000_CPU_OPTION ("power6x", PROCESSOR_POWER6,
- MASK_POWERPC64 | OPTION_MASK_PPC_GPOPT
- | OPTION_MASK_PPC_GFXOPT | OPTION_MASK_MFCRF
- | OPTION_MASK_POPCNTB | OPTION_MASK_FPRND
- | OPTION_MASK_CMPB | OPTION_MASK_DFP
- | OPTION_MASK_RECIP_PRECISION,
- CPU_OPTION_POWER6_ALL_MASKS)
-RS6000_CPU_OPTION ("power7", PROCESSOR_POWER7,
- MASK_POWERPC64 | ISA_2_6_MASKS_SERVER,
- CPU_OPTION_POWER7_ALL_MASKS)
-RS6000_CPU_OPTION ("power8", PROCESSOR_POWER8,
- MASK_POWERPC64 | ISA_2_7_MASKS_SERVER | OPTION_MASK_HTM,
- CPU_OPTION_POWER8_ALL_MASKS)
-RS6000_CPU_OPTION ("power9", PROCESSOR_POWER9,
- MASK_POWERPC64 | ISA_3_0_MASKS_SERVER | OPTION_MASK_HTM,
- CPU_OPTION_POWER9_ALL_MASKS)
-RS6000_CPU_OPTION ("power10", PROCESSOR_POWER10,
- MASK_POWERPC64 | ISA_3_1_MASKS_SERVER,
- CPU_OPTION_POWER10_ALL_MASKS)
-RS6000_CPU_OPTION ("power11", PROCESSOR_POWER11,
- MASK_POWERPC64 | POWER11_MASKS_SERVER,
- CPU_OPTION_POWER11_ALL_MASKS)
-/* At the present time, do not define a new processor for -mcpu=future. At
- some point, it may be provided, but for now, treat the cpu as being tuned
- the same as a power11. */
-RS6000_CPU_OPTION ("future", PROCESSOR_POWER11,
- MASK_POWERPC64 | FUTURE_MASKS_SERVER,
- CPU_OPTION_FUTURE_ALL_MASKS)
+RS6000_CPU ("power6", PROCESSOR_POWER6, MASK_POWERPC64 | OPTION_MASK_PPC_GPOPT
+ | OPTION_MASK_PPC_GFXOPT | OPTION_MASK_MFCRF | OPTION_MASK_POPCNTB
+ | OPTION_MASK_FPRND | OPTION_MASK_CMPB | OPTION_MASK_DFP
+ | OPTION_MASK_RECIP_PRECISION)
+RS6000_CPU ("power6x", PROCESSOR_POWER6, MASK_POWERPC64 | OPTION_MASK_PPC_GPOPT
+ | OPTION_MASK_PPC_GFXOPT | OPTION_MASK_MFCRF | OPTION_MASK_POPCNTB
+ | OPTION_MASK_FPRND | OPTION_MASK_CMPB | OPTION_MASK_DFP
+ | OPTION_MASK_RECIP_PRECISION)
+RS6000_CPU ("power7", PROCESSOR_POWER7, MASK_POWERPC64 | ISA_2_6_MASKS_SERVER)
+RS6000_CPU ("power8", PROCESSOR_POWER8, MASK_POWERPC64 | ISA_2_7_MASKS_SERVER
+ | OPTION_MASK_HTM)
+RS6000_CPU ("power9", PROCESSOR_POWER9, MASK_POWERPC64 | ISA_3_0_MASKS_SERVER
+ | OPTION_MASK_HTM)
+RS6000_CPU ("power10", PROCESSOR_POWER10, MASK_POWERPC64 | ISA_3_1_MASKS_SERVER)
+RS6000_CPU ("power11", PROCESSOR_POWER11, MASK_POWERPC64 | POWER11_MASKS_SERVER)
RS6000_CPU ("powerpc", PROCESSOR_POWERPC, 0)
RS6000_CPU ("powerpc64", PROCESSOR_POWERPC64, OPTION_MASK_PPC_GFXOPT
| MASK_POWERPC64)
diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index 4619142d197b..234eb0ae2b3a 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -324,9 +324,8 @@ extern void rs6000_cpu_cpp_builtins (struct cpp_reader *);
extern bool rs6000_pragma_target_parse (tree, tree);
#endif
extern void rs6000_activate_target_options (tree new_tree);
-extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT, HOST_WIDE_INT);
-extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT,
- HOST_WIDE_INT);
+extern void rs6000_target_modify_macros (bool, HOST_WIDE_INT);
+extern void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT);
#ifdef NO_DOLLAR_IN_LABEL
const char * rs6000_xcoff_strip_dollar (const char *);
diff --git a/gcc/config/rs6000/rs6000-tables.opt b/gcc/config/rs6000/rs6000-tables.opt
index 518324e7aead..f5bbed5ea746 100644
--- a/gcc/config/rs6000/rs6000-tables.opt
+++ b/gcc/config/rs6000/rs6000-tables.opt
@@ -189,17 +189,14 @@ EnumValue
Enum(rs6000_cpu_opt_value) String(power11) Value(53)
EnumValue
-Enum(rs6000_cpu_opt_value) String(future) Value(54)
+Enum(rs6000_cpu_opt_value) String(powerpc) Value(54)
EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc) Value(55)
+Enum(rs6000_cpu_opt_value) String(powerpc64) Value(55)
EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64) Value(56)
+Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(56)
EnumValue
-Enum(rs6000_cpu_opt_value) String(powerpc64le) Value(57)
-
-EnumValue
-Enum(rs6000_cpu_opt_value) String(rs64) Value(58)
+Enum(rs6000_cpu_opt_value) String(rs64) Value(57)
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 440b76140bfc..8dd23f8619cd 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -250,17 +250,17 @@ enum {
/* Map compiler ISA bits into HWCAP names. */
struct clone_map {
- HOST_WIDE_INT cpu_option; /* CPU options mask */
+ HOST_WIDE_INT isa_mask; /* rs6000_isa mask */
const char *name; /* name to use in __builtin_cpu_supports. */
};
static const struct clone_map rs6000_clone_map[CLONE_MAX] = {
{ 0, "" }, /* Default options. */
- { CPU_OPTION_POWER6_MASK, "arch_2_05" }, /* ISA 2.05 (power6). */
- { CPU_OPTION_POWER7_MASK, "arch_2_06" }, /* ISA 2.06 (power7). */
- { CPU_OPTION_POWER8_MASK, "arch_2_07" }, /* ISA 2.07 (power8). */
- { CPU_OPTION_POWER9_MASK, "arch_3_00" }, /* ISA 3.0 (power9). */
- { CPU_OPTION_POWER10_MASK, "arch_3_1" }, /* ISA 3.1 (power10). */
+ { OPTION_MASK_CMPB, "arch_2_05" }, /* ISA 2.05 (power6). */
+ { OPTION_MASK_POPCNTD, "arch_2_06" }, /* ISA 2.06 (power7). */
+ { OPTION_MASK_P8_VECTOR, "arch_2_07" }, /* ISA 2.07 (power8). */
+ { OPTION_MASK_P9_VECTOR, "arch_3_00" }, /* ISA 3.0 (power9). */
+ { OPTION_MASK_POWER10, "arch_3_1" }, /* ISA 3.1 (power10). */
};
@@ -276,7 +276,7 @@ bool cpu_builtin_p = false;
/* Pointer to function (in rs6000-c.cc) that can define or undefine target
macros that have changed. Languages that don't support the preprocessor
don't link in rs6000-c.cc, so we can't call it directly. */
-void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT, HOST_WIDE_INT);
+void (*rs6000_target_modify_macros_ptr) (bool, HOST_WIDE_INT);
/* Simplfy register classes into simpler classifications. We assume
GPR_REG_TYPE - FPR_REG_TYPE are ordered so that we can use a simple range
@@ -1066,7 +1066,7 @@ struct processor_costs power9_cost = {
COSTS_N_INSNS (3), /* SF->DF convert */
};
-/* Instruction costs on Power10/Power11/Future processors. */
+/* Instruction costs on Power10/Power11 processors. */
static const
struct processor_costs power10_cost = {
COSTS_N_INSNS (2), /* mulsi */
@@ -1169,7 +1169,7 @@ enum reg_class (*rs6000_preferred_reload_class_ptr) (rtx, enum reg_class)
const int INSN_NOT_AVAILABLE = -1;
static void rs6000_print_isa_options (FILE *, int, const char *,
- HOST_WIDE_INT, HOST_WIDE_INT);
+ HOST_WIDE_INT);
static HOST_WIDE_INT rs6000_disable_incompatible_switches (void);
static enum rs6000_reg_type register_to_reg_type (rtx, bool *);
@@ -1792,17 +1792,13 @@ struct rs6000_ptt
const char *const name; /* Canonical processor name. */
const enum processor_type processor; /* Processor type enum value. */
const HOST_WIDE_INT target_enable; /* Target flags to enable. */
- const HOST_WIDE_INT cpu_option; /* CPU flags set with -mcpu=. */
};
static struct rs6000_ptt const processor_target_table[] =
{
-#define RS6000_CPU(NAME, CPU, FLAGS) { NAME, CPU, FLAGS, 0 },
-#define RS6000_CPU_OPTION(NAME, CPU, FLAGS, CPU_OPTION) \
- { NAME, CPU, FLAGS, CPU_OPTION },
+#define RS6000_CPU(NAME, CPU, FLAGS) { NAME, CPU, FLAGS },
#include "rs6000-cpus.def"
#undef RS6000_CPU
-#undef RS6000_CPU_OPTION
};
/* Look up a processor name for -mcpu=xxx and -mtune=xxx. Return -1 if the
@@ -2224,8 +2220,7 @@ rs6000_debug_print_mode (ssize_t m)
#define DEBUG_FMT_ID "%-32s= "
#define DEBUG_FMT_D DEBUG_FMT_ID "%d\n"
-#define DEBUG_FMT_WX DEBUG_FMT_ID "%#.12" HOST_WIDE_INT_PRINT "x" \
- ", 0x%.2" HOST_WIDE_INT_PRINT "x: "
+#define DEBUG_FMT_WX DEBUG_FMT_ID "%#.12" HOST_WIDE_INT_PRINT "x: "
#define DEBUG_FMT_S DEBUG_FMT_ID "%s\n"
/* Print various interesting information with -mdebug=reg. */
@@ -2405,11 +2400,9 @@ rs6000_debug_reg_global (void)
const char *name = processor_target_table[rs6000_cpu_index].name;
HOST_WIDE_INT flags
= processor_target_table[rs6000_cpu_index].target_enable;
- HOST_WIDE_INT cpu_option
- = processor_target_table[rs6000_cpu_index].cpu_option;
sprintf (flags_buffer, "-mcpu=%s flags", name);
- rs6000_print_isa_options (stderr, 0, flags_buffer, flags, cpu_option);
+ rs6000_print_isa_options (stderr, 0, flags_buffer, flags);
}
else
fprintf (stderr, DEBUG_FMT_S, "cpu", "<none>");
@@ -2421,19 +2414,19 @@ rs6000_debug_reg_global (void)
= processor_target_table[rs6000_tune_index].target_enable;
sprintf (flags_buffer, "-mtune=%s flags", name);
- rs6000_print_isa_options (stderr, 0, flags_buffer, flags, 0);
+ rs6000_print_isa_options (stderr, 0, flags_buffer, flags);
}
else
fprintf (stderr, DEBUG_FMT_S, "tune", "<none>");
cl_target_option_save (&cl_opts, &global_options, &global_options_set);
rs6000_print_isa_options (stderr, 0, "rs6000_isa_flags",
- rs6000_isa_flags, rs6000_cpu_option_flags);
+ rs6000_isa_flags);
rs6000_print_isa_options (stderr, 0, "rs6000_isa_flags_explicit",
- rs6000_isa_flags_explicit, 0);
+ rs6000_isa_flags_explicit);
- rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT, 0);
+ rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT);
fprintf (stderr, DEBUG_FMT_S, "--with-cpu default",
OPTION_TARGET_CPU_DEFAULT ? OPTION_TARGET_CPU_DEFAULT : "<none>");
@@ -3630,7 +3623,7 @@ rs6000_option_override_internal (bool global_init_p)
/* Print defaults. */
if ((TARGET_DEBUG_REG || TARGET_DEBUG_TARGET) && global_init_p)
- rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT, 0);
+ rs6000_print_isa_options (stderr, 0, "TARGET_DEFAULT", TARGET_DEFAULT);
/* Remember the explicit arguments. */
if (global_init_p)
@@ -3734,7 +3727,6 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags &= ~set_masks;
rs6000_isa_flags |= (processor_target_table[cpu_index].target_enable
& set_masks);
- rs6000_cpu_option_flags = processor_target_table[cpu_index].cpu_option;
}
else
{
@@ -3760,7 +3752,6 @@ rs6000_option_override_internal (bool global_init_p)
flags = processor_target_table[default_cpu_index].target_enable;
}
rs6000_isa_flags |= (flags & ~rs6000_isa_flags_explicit);
- rs6000_cpu_option_flags = 0;
}
/* Don't expect powerpc64 enabled on those OSes with OS_MISSING_POWERPC64,
@@ -3882,8 +3873,7 @@ rs6000_option_override_internal (bool global_init_p)
& ~rs6000_isa_flags_explicit);
if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
- rs6000_print_isa_options (stderr, 0, "before defaults", rs6000_isa_flags,
- rs6000_cpu_option_flags);
+ rs6000_print_isa_options (stderr, 0, "before defaults", rs6000_isa_flags);
#ifdef XCOFF_DEBUGGING_INFO
/* For AIX default to 64-bit DWARF. */
@@ -4244,8 +4234,7 @@ rs6000_option_override_internal (bool global_init_p)
/* Print the options after updating the defaults. */
if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
- rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags,
- rs6000_cpu_option_flags);
+ rs6000_print_isa_options (stderr, 0, "after defaults", rs6000_isa_flags);
/* E500mc does "better" if we inline more aggressively. Respect the
user's opinion, though. */
@@ -4352,8 +4341,7 @@ rs6000_option_override_internal (bool global_init_p)
TARGET_NO_FP_IN_TOC = 1;
if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
- rs6000_print_isa_options (stderr, 0, "before subtarget", rs6000_isa_flags,
- rs6000_cpu_option_flags);
+ rs6000_print_isa_options (stderr, 0, "before subtarget", rs6000_isa_flags);
#ifdef SUBTARGET_OVERRIDE_OPTIONS
SUBTARGET_OVERRIDE_OPTIONS;
@@ -4420,8 +4408,7 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags &= ~OPTION_MASK_PCREL_OPT;
if (TARGET_DEBUG_REG || TARGET_DEBUG_TARGET)
- rs6000_print_isa_options (stderr, 0, "after subtarget", rs6000_isa_flags,
- rs6000_cpu_option_flags);
+ rs6000_print_isa_options (stderr, 0, "after subtarget", rs6000_isa_flags);
rs6000_always_hint = (rs6000_tune != PROCESSOR_POWER4
&& rs6000_tune != PROCESSOR_POWER5
@@ -5929,19 +5916,17 @@ rs6000_machine_from_flags (void)
flags &= ~(OPTION_MASK_PPC_GFXOPT | OPTION_MASK_PPC_GPOPT | OPTION_MASK_ISEL
| OPTION_MASK_ALTIVEC);
- if ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0)
- return "future";
- if ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
+ if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
return "power11";
- if ((rs6000_cpu_option_flags & CPU_OPTION_POWER10_MASK) != 0)
+ if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
return "power10";
- if ((rs6000_cpu_option_flags & CPU_OPTION_POWER9_MASK) != 0)
+ if ((flags & (ISA_3_0_MASKS_SERVER & ~ISA_2_7_MASKS_SERVER)) != 0)
return "power9";
- if ((rs6000_cpu_option_flags & CPU_OPTION_POWER8_MASK) != 0)
+ if ((flags & (ISA_2_7_MASKS_SERVER & ~ISA_2_6_MASKS_SERVER)) != 0)
return "power8";
- if ((rs6000_cpu_option_flags & CPU_OPTION_POWER7_MASK) != 0)
+ if ((flags & (ISA_2_6_MASKS_SERVER & ~ISA_2_5_MASKS_SERVER)) != 0)
return "power7";
- if ((rs6000_cpu_option_flags & CPU_OPTION_POWER6_MASK) != 0)
+ if ((flags & (ISA_2_5_MASKS_SERVER & ~ISA_2_4_MASKS)) != 0)
return "power6";
if ((flags & (ISA_2_4_MASKS & ~ISA_2_1_MASKS)) != 0)
return "power5";
@@ -24481,6 +24466,8 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "float128", OPTION_MASK_FLOAT128_KEYWORD, false, true },
{ "float128-hardware", OPTION_MASK_FLOAT128_HW, false, true },
{ "fprnd", OPTION_MASK_FPRND, false, true },
+ { "power10", OPTION_MASK_POWER10, false, true },
+ { "power11", OPTION_MASK_POWER11, false, false },
{ "hard-dfp", OPTION_MASK_DFP, false, true },
{ "htm", OPTION_MASK_HTM, false, true },
{ "isel", OPTION_MASK_ISEL, false, true },
@@ -24537,22 +24524,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
{ "string", 0, false, false },
};
-/* Map CPU option mask bits to a printable string. */
-struct rs6000_cpu_opt_mask {
- const char *name; /* option name */
- const HOST_WIDE_INT mask; /* mask for the cpu option */
-};
-
-static struct rs6000_cpu_opt_mask const rs6000_cpu_opt_masks[] =
-{
- { "power7", CPU_OPTION_POWER7_MASK },
- { "power8", CPU_OPTION_POWER8_MASK },
- { "power9", CPU_OPTION_POWER9_MASK },
- { "power10", CPU_OPTION_POWER10_MASK },
- { "power11", CPU_OPTION_POWER11_MASK },
- { "future", CPU_OPTION_FUTURE_MASK },
-};
-
/* Option variables that we want to support inside attribute((target)) and
#pragma GCC target operations. */
@@ -24911,7 +24882,6 @@ rs6000_pragma_target_parse (tree args, tree pop_target)
tree cur_tree;
struct cl_target_option *prev_opt, *cur_opt;
HOST_WIDE_INT prev_flags, cur_flags, diff_flags;
- HOST_WIDE_INT prev_cpu_option, cur_cpu_option, diff_cpu_option;
if (TARGET_DEBUG_TARGET)
{
@@ -24962,28 +24932,23 @@ rs6000_pragma_target_parse (tree args, tree pop_target)
change the macros that are defined. */
if (rs6000_target_modify_macros_ptr)
{
- prev_opt = TREE_TARGET_OPTION (prev_tree);
- prev_flags = prev_opt->x_rs6000_isa_flags;
- prev_cpu_option = prev_opt->x_rs6000_cpu_option_flags;
+ prev_opt = TREE_TARGET_OPTION (prev_tree);
+ prev_flags = prev_opt->x_rs6000_isa_flags;
- cur_opt = TREE_TARGET_OPTION (cur_tree);
- cur_flags = cur_opt->x_rs6000_isa_flags;
- cur_cpu_option = cur_opt->x_rs6000_cpu_option_flags;
+ cur_opt = TREE_TARGET_OPTION (cur_tree);
+ cur_flags = cur_opt->x_rs6000_isa_flags;
- diff_flags = (prev_flags ^ cur_flags);
- diff_cpu_option = (prev_cpu_option ^ cur_cpu_option);
+ diff_flags = (prev_flags ^ cur_flags);
- if (diff_flags != 0 || diff_cpu_option != 0)
+ if (diff_flags != 0)
{
/* Delete old macros. */
rs6000_target_modify_macros_ptr (false,
- prev_flags & diff_flags,
- prev_cpu_option & diff_cpu_option);
+ prev_flags & diff_flags);
/* Define new macros. */
rs6000_target_modify_macros_ptr (true,
- cur_flags & diff_flags,
- cur_cpu_option & diff_cpu_option);
+ cur_flags & diff_flags);
}
}
@@ -25097,7 +25062,6 @@ rs6000_function_specific_save (struct cl_target_option *ptr,
{
ptr->x_rs6000_isa_flags = opts->x_rs6000_isa_flags;
ptr->x_rs6000_isa_flags_explicit = opts->x_rs6000_isa_flags_explicit;
- ptr->x_rs6000_cpu_option_flags = opts->x_rs6000_cpu_option_flags;
}
/* Restore the current options */
@@ -25110,7 +25074,6 @@ rs6000_function_specific_restore (struct gcc_options *opts,
{
opts->x_rs6000_isa_flags = ptr->x_rs6000_isa_flags;
opts->x_rs6000_isa_flags_explicit = ptr->x_rs6000_isa_flags_explicit;
- opts->x_rs6000_cpu_option_flags = ptr->x_rs6000_cpu_option_flags;
(void) rs6000_option_override_internal (false);
}
@@ -25121,11 +25084,10 @@ rs6000_function_specific_print (FILE *file, int indent,
struct cl_target_option *ptr)
{
rs6000_print_isa_options (file, indent, "Isa options set",
- ptr->x_rs6000_isa_flags,
- ptr->x_rs6000_cpu_option_flags);
+ ptr->x_rs6000_isa_flags);
rs6000_print_isa_options (file, indent, "Isa options explicit",
- ptr->x_rs6000_isa_flags_explicit, 0);
+ ptr->x_rs6000_isa_flags_explicit);
}
/* Helper function to print the current isa or misc options on a line. */
@@ -25137,11 +25099,7 @@ rs6000_print_options_internal (FILE *file,
HOST_WIDE_INT flags,
const char *prefix,
const struct rs6000_opt_mask *opts,
- size_t num_elements,
- HOST_WIDE_INT cpu_option,
- const char *cpu_option_prefix,
- const struct rs6000_cpu_opt_mask *cpu_opts,
- size_t num_cpu_elements)
+ size_t num_elements)
{
size_t i;
size_t start_column = 0;
@@ -25154,13 +25112,13 @@ rs6000_print_options_internal (FILE *file,
if (indent)
start_column += fprintf (file, "%*s", indent, "");
- if (!flags && !cpu_option)
+ if (!flags)
{
fprintf (stderr, DEBUG_FMT_S, string, "<none>");
return;
}
- start_column += fprintf (stderr, DEBUG_FMT_WX, string, flags, cpu_option);
+ start_column += fprintf (stderr, DEBUG_FMT_WX, string, flags);
/* Print the various mask options. */
cur_column = start_column;
@@ -25207,33 +25165,6 @@ rs6000_print_options_internal (FILE *file,
comma_len = strlen (", ");
}
- /* print the cpu isa bits that are set directly from -mcpu=<xxx> and there
- is not an explicit -m<foo> option. We don't have to worry about inverting
- options for the CPU ISA bits. */
- for (i = 0; i < num_cpu_elements; i++)
- {
- const char *name = cpu_opts[i].name;
- HOST_WIDE_INT mask = cpu_opts[i].mask;
- size_t len = comma_len + prefix_len + strlen (name);
-
- if ((cpu_option & mask) != 0)
- {
- cpu_option &= ~mask;
-
- cur_column += len;
- if (cur_column > max_column)
- {
- fprintf (stderr, ", \\\n%*s", (int)start_column, "");
- cur_column = start_column + len;
- comma = "";
- }
-
- fprintf (file, "%s%s%s", comma, cpu_option_prefix, name);
- comma = ", ";
- comma_len = strlen (", ");
- }
- }
-
fputs ("\n", file);
}
@@ -25241,14 +25172,11 @@ rs6000_print_options_internal (FILE *file,
static void
rs6000_print_isa_options (FILE *file, int indent, const char *string,
- HOST_WIDE_INT flags, HOST_WIDE_INT cpu_option)
+ HOST_WIDE_INT flags)
{
rs6000_print_options_internal (file, indent, string, flags, "-m",
&rs6000_opt_masks[0],
- ARRAY_SIZE (rs6000_opt_masks),
- cpu_option, "cpu-option=",
- &rs6000_cpu_opt_masks[0],
- ARRAY_SIZE (rs6000_cpu_opt_masks));
+ ARRAY_SIZE (rs6000_opt_masks));
}
/* If the user used -mno-vsx, we need turn off all of the implicit ISA 2.06,
@@ -25338,7 +25266,7 @@ static int
rs6000_clone_priority (tree fndecl)
{
tree fn_opts = DECL_FUNCTION_SPECIFIC_TARGET (fndecl);
- HOST_WIDE_INT cpu_option;
+ HOST_WIDE_INT isa_masks;
int ret = CLONE_DEFAULT;
tree attrs = lookup_attribute ("target", DECL_ATTRIBUTES (fndecl));
const char *attrs_str = NULL;
@@ -25354,12 +25282,12 @@ rs6000_clone_priority (tree fndecl)
fn_opts = target_option_default_node;
if (!fn_opts || !TREE_TARGET_OPTION (fn_opts))
- cpu_option = rs6000_cpu_option_flags;
+ isa_masks = rs6000_isa_flags;
else
- cpu_option = TREE_TARGET_OPTION (fn_opts)->x_rs6000_cpu_option_flags;
+ isa_masks = TREE_TARGET_OPTION (fn_opts)->x_rs6000_isa_flags;
for (ret = CLONE_MAX - 1; ret != 0; ret--)
- if ((rs6000_clone_map[ret].cpu_option & cpu_option) != 0)
+ if ((rs6000_clone_map[ret].isa_mask & isa_masks) != 0)
break;
}
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 1d63d5f1ca38..db6112a09e11 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -101,7 +101,6 @@
you make changes here, make them also there. */
#define ASM_CPU_SPEC \
"%{mcpu=native: %(asm_cpu_native); \
- mcpu=future: -mfuture; \
mcpu=power11: -mpower11; \
mcpu=power10: -mpower10; \
mcpu=power9: -mpower9; \
@@ -556,15 +555,6 @@ extern int rs6000_vector_align[];
#define TARGET_DIRECT_MOVE_64BIT (TARGET_DIRECT_MOVE \
&& TARGET_POWERPC64)
-/* ISA bits that are set via -mcpu=<xxx>, but that do not have an associated
- switch with the option. */
-#define TARGET_POWER10 \
- ((rs6000_cpu_option_flags & CPU_OPTION_POWER10_MASK) != 0)
-#define TARGET_POWER11 \
- ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
-#define TARGET_FUTURE \
- ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0)
-
/* Inlining allows targets to define the meanings of bits in target_info
field of ipa_fn_summary by itself, the used bits for rs6000 are listed
below. */
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 451afabe2c1f..88cf16ca581a 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -36,15 +36,6 @@ HOST_WIDE_INT rs6000_isa_flags_explicit
TargetSave
HOST_WIDE_INT x_rs6000_isa_flags_explicit
-;; Cpu feature flag bits (on/off) that are enabled with the -mcpu=<xxx>
-;; option, but do not have an explicit -m<xxx> option attached to the
-;; ISA bit.
-Variable
-HOST_WIDE_INT rs6000_cpu_option_flags = 0
-
-TargetSave
-HOST_WIDE_INT x_rs6000_cpu_option_flags
-
;; Current processor
TargetVariable
enum processor_type rs6000_cpu = PROCESSOR_PPC603
@@ -596,10 +587,13 @@ mspeculate-indirect-jumps
Target Undocumented Var(rs6000_speculate_indirect_jumps) Init(1) Save
mpower10
-Target Undocumented WarnRemoved
+Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
+;; Users should not use -mpower11, but we need to use a bit to identify when
+;; the user changes the default cpu via #pragma GCC target("cpu=power11")
+;; and then resets it later.
mpower11
-Target Undocumented WarnRemoved
+Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
mprefixed
Target Mask(PREFIXED) Var(rs6000_isa_flags)
diff --git a/gcc/testsuite/gcc.target/powerpc/future-1.c b/gcc/testsuite/gcc.target/powerpc/future-1.c
deleted file mode 100644
index 7bd8e5ddbd00..000000000000
--- a/gcc/testsuite/gcc.target/powerpc/future-1.c
+++ /dev/null
@@ -1,13 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-mdejagnu-cpu=future -O2" } */
-
-/* Basic check to see if the compiler supports -mcpu=future and if it defines
- _ARCH_FUTURE. */
-
-#ifndef _ARCH_FUTURE
-#error "-mcpu=future is not supported"
-#endif
-
-void foo (void)
-{
-}
diff --git a/gcc/testsuite/gcc.target/powerpc/future-2.c b/gcc/testsuite/gcc.target/powerpc/future-2.c
deleted file mode 100644
index 5552cefa3c2e..000000000000
--- a/gcc/testsuite/gcc.target/powerpc/future-2.c
+++ /dev/null
@@ -1,24 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-O2" } */
-
-/* Check if we can set the future target via a target attribute. */
-
-__attribute__((__target__("cpu=power9")))
-void foo_p9 (void)
-{
-}
-
-__attribute__((__target__("cpu=power10")))
-void foo_p10 (void)
-{
-}
-
-__attribute__((__target__("cpu=power11")))
-void foo_p11 (void)
-{
-}
-
-__attribute__((__target__("cpu=future")))
-void foo_future (void)
-{
-}
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