[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] [RISC-V] Force several tests to use rocket tuning

[Jeff Law]

https://gcc.gnu.org/g:22cd1807d9a9d18c1e77e3ec9d9a33f2aa603798

commit 22cd1807d9a9d18c1e77e3ec9d9a33f2aa603798
Author: Jeff Law <jlaw@ventanamicro.com>
Date:   Thu Jun 19 20:58:56 2025 -0600

    [RISC-V] Force several tests to use rocket tuning
    
    My tester has been flagging these regressions since the default cost model was
    committed, along with several others
    
    > unix/-march=rv64gc_zba_zbb_zbs_zicond: gcc: gcc.target/riscv/rvv/vsetvl/avl_single-37.c   -O2   scan-assembler-times \\.L[0-9]+\\:\\s+addi\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[0-9]00\\s+addi\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[0-9]00\\s+addi\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[0-9]00\\s+add\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[a-x0-9]+\\s+\\.L[0-9]+\\: 1
    > unix/-march=rv64gc_zba_zbb_zbs_zicond: gcc: gcc.target/riscv/rvv/vsetvl/avl_single-37.c   -O2 -flto -fno-use-linker-plugin -flto-partition=none   scan-assembler-times \\.L[0-9]+\\:\\s+addi\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[0-9]00\\s+addi\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[0-9]00\\s+addi\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[0-9]00\\s+add\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[a-x0-9]+\\s+\\.L[0-9]+\\: 1
    > unix/-march=rv64gc_zba_zbb_zbs_zicond: gcc: gcc.target/riscv/rvv/vsetvl/avl_single-37.c   -O2 -flto -fuse-linker-plugin -fno-fat-lto-objects   scan-assembler-times \\.L[0-9]+\\:\\s+addi\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[0-9]00\\s+addi\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[0-9]00\\s+addi\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[0-9]00\\s+add\\s+\\s*[a-x0-9]+,\\s*[a-x0-9]+,\\s*[a-x0-9]+\\s+\\.L[0-9]+\\: 1
    
    I really question the value of checking the output that precisely in these
    tests -- they're supposed to be checking vsetvl correctness and optimization,
    so the ordering and such of scalar ops shouldn't really be important at all.
    
    Regardless, since I don't know these tests at all I resisted the temptation to
    rip out the undesirable aspects of the test.
    
    Next up, fix the bogus scan or force the old cost model (rocket).  I choose the
    latter as a path of least resistance and least surprise.
    
    Waiting for pre-commit CI to spin.
    
    gcc/testsuite
            * gcc.target/riscv/rvv/vsetvl/avl_single-37.c: Force rocket tuning.
            * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c: Likewise.
            * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c: Likewise.
            * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c: Likewise.
            * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c: Likewise.
    
    (cherry picked from commit c59cea256ad3eaf34298bb9ce947af89bbc7331f)

Diff:
---
 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c    | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c | 2 +-
 gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c
index cd3e961cefe1..9bade063f17e 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/avl_single-37.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize" } */
+/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-schedule-insns -fno-schedule-insns2 -fno-tree-vectorize -mtune=rocket" } */
 
 #include "riscv_vector.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c
index d7f6d18d1d61..321eb3b9f298 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-17.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -mtune=rocket" } */
 
 #include "riscv_vector.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c
index 1354c5e46d02..29dcfefbd0cf 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-18.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -mtune=rocket" } */
 
 #include "riscv_vector.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c
index 6366dd9db44f..8b6299e99d1f 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-19.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -mtune=rocket" } */
 
 #include "riscv_vector.h"
 
diff --git a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c
index bbff028dad16..3b836f927d20 100644
--- a/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c
+++ b/gcc/testsuite/gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-20.c
@@ -1,5 +1,5 @@
 /* { dg-do compile } */
-/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize" } */
+/* { dg-options "-mrvv-vector-bits=scalable -march=rv32gcv -mabi=ilp32 -fno-tree-vectorize -mtune=rocket" } */
 
 #include "riscv_vector.h"