[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Update the comments of vx combine [NFC]

[Jeff Law]

https://gcc.gnu.org/g:094b2c98a80793a3d83f22a5865fc4ff4ed56bf4

commit 094b2c98a80793a3d83f22a5865fc4ff4ed56bf4
Author: Pan Li <pan2.li@intel.com>
Date:   Sat Aug 16 16:08:23 2025 +0800

    RISC-V: Update the comments of vx combine [NFC]
    
    The supported insn of vx combine is out of date, update all
    insn supported for now.
    
    gcc/ChangeLog:
    
            * config/riscv/autovec-opt.md: Add supported insn
            of vx combine.
    
    Signed-off-by: Pan Li <pan2.li@intel.com>
    (cherry picked from commit 38d76a4e6033016b5e2dcaae57df67075a605edd)

Diff:
---
 gcc/config/riscv/autovec-opt.md | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/gcc/config/riscv/autovec-opt.md b/gcc/config/riscv/autovec-opt.md
index f1e592b46b52..ed0280fa987f 100644
--- a/gcc/config/riscv/autovec-opt.md
+++ b/gcc/config/riscv/autovec-opt.md
@@ -1679,6 +1679,26 @@
 ;; Combine vec_duplicate + op.vv to op.vx
 ;; Include
 ;; - vadd.vx
+;; - vsub.vx
+;; - vrsub.vx
+;; - vand.vx
+;; - vor.vx
+;; - vmul.vx
+;; - vdiv.vx
+;; - vdivu.vx
+;; - vrem.vx
+;; - vremu.vx
+;; - vmax.vx
+;; - vmaxu.vx
+;; - vmin.vx
+;; - vminu.vx
+;; - vsadd.vx
+;; - vsaddu.vx
+;; - vssub.vx
+;; - vssubu.vx
+;; - vaadd.vx
+;; - vaaddu.vx
+;; - vmerge.vxm
 ;; =============================================================================
 (define_insn_and_split "*<optab>_vx_<mode>"
  [(set (match_operand:V_VLSI    0 "register_operand")