[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil
Jeff Law
law@gcc.gnu.org
Sat Sep 6 14:53:24 GMT 2025
https://gcc.gnu.org/g:f22c90668126adb138c09f49fb7a401680bfa2bf
commit f22c90668126adb138c09f49fb7a401680bfa2bf
Author: Pan Li <pan2.li@intel.com>
Date: Sat Jul 19 17:17:11 2025 +0800
RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil
According to the semantics of the avg_floor and avg_ceil as below:
floor: op0 = (narrow) (((wide) op1 + (wide) op2) >> 1);
ceil: op0 = (narrow) (((wide) op1 + (wide) op2 + 1) >> 1);
Aka we have (const_int 1) as the op2 of the ashiftrt but seems missed.
Thus, add it back to align the definition.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/autovec.md: Add (const_int 1) as the op2 of
ashiftrt.
Signed-off-by: Pan Li <pan2.li@intel.com>
(cherry picked from commit c655047d3dbd4db295ea9385ac2e337cba0b5e05)
Diff:
---
gcc/config/riscv/autovec.md | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
index da5d0e34d0ab..1fff8ac2fc46 100644
--- a/gcc/config/riscv/autovec.md
+++ b/gcc/config/riscv/autovec.md
@@ -2489,7 +2489,8 @@
(sign_extend:VWEXTI
(match_operand:<V_DOUBLE_TRUNC> 1 "register_operand"))
(sign_extend:VWEXTI
- (match_operand:<V_DOUBLE_TRUNC> 2 "register_operand"))))))]
+ (match_operand:<V_DOUBLE_TRUNC> 2 "register_operand")))
+ (const_int 1))))]
"TARGET_VECTOR"
{
insn_code icode = code_for_pred (UNSPEC_VAADD, <V_DOUBLE_TRUNC>mode);
@@ -2522,7 +2523,8 @@
(match_operand:<V_DOUBLE_TRUNC> 1 "register_operand"))
(sign_extend:VWEXTI
(match_operand:<V_DOUBLE_TRUNC> 2 "register_operand")))
- (const_int 1)))))]
+ (const_int 1))
+ (const_int 1))))]
"TARGET_VECTOR"
{
insn_code icode = code_for_pred (UNSPEC_VAADD, <V_DOUBLE_TRUNC>mode);
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