[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Refine the scalar SAT_* test cases
Jeff Law
law@gcc.gnu.org
Sat Sep 6 14:52:58 GMT 2025
https://gcc.gnu.org/g:67614044dba441a8471ced0f4c6d66abcb09adaa
commit 67614044dba441a8471ced0f4c6d66abcb09adaa
Author: Pan Li <pan2.li@intel.com>
Date: Sat Jul 12 22:26:32 2025 +0800
RISC-V: Refine the scalar SAT_* test cases
Per previous discuss with Jeff, we don't do complicated
asm check like scalar saturation alu. It is somehow
not easy to maintain, as well as fragile. Thus, we
remove these function-body check, and introduce the
jmp label asm check instead.The code-gen of SAT_*
will never have a jmp, and the other run test will
make sure the correctness of SAT_* code-gen.
The below test suites are passed for this patch series.
* The rv64gcv fully regression test.
The below failed test cases are resolved:
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Oz
check-function-bodies sat_s_add_imm_int8_t_fmt_2_1
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Os
check-function-bodies sat_s_add_imm_int8_t_fmt_2_1
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -O3
check-function-bodies sat_s_add_imm_int8_t_fmt_2_1
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Ofast
check-function-bodies sat_s_add_imm_int8_t_fmt_2_1
FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -O2
check-function-bodies sat_s_add_imm_int8_t_fmt_2_1
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat/sat_s_add-1-i16.c: Remove function-body
check and add no jmp label asm check.
* gcc.target/riscv/sat/sat_s_add-1-i32.c:
* gcc.target/riscv/sat/sat_s_add-1-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-1-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-2-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-2-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-2-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-2-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-3-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-3-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-3-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-3-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-4-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-4-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-4-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add-4-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-1-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-1-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-1-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-1-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-2-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-2-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-2-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_add_imm-2-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-1-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-1-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-1-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-1-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-2-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-2-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-2-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-2-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-3-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-3-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-3-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-3-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-4-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-4-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-4-i64.c: Ditto.
* gcc.target/riscv/sat/sat_s_sub-4-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c: Ditto.
* gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-1-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-1-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-1-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-1-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-2-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-2-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-2-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-2-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-3-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-3-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-3-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-3-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-4-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-4-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-4-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-4-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-5-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-5-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-5-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-5-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-6-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-6-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-6-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-6-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-1-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-1-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-1-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-1-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-2-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-2-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-2-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-2-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-3-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-3-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-3-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-3-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-4-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-4-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-4-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_add_imm-4-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c: Ditto.
* gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c: Ditto.
* gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c: Ditto.
* gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-1-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-1-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-1-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-1-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-10-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-10-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-10-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-10-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-11-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-11-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-11-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-11-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-12-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-12-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-12-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-12-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-2-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-2-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-2-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-2-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-3-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-3-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-3-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-3-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-4-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-4-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-4-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-4-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-5-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-5-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-5-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-5-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-6-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-6-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-6-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-6-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-7-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-7-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-7-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-7-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-8-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-8-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-8-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-8-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-9-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-9-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-9-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub-9-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c: Ditto.
* gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-1-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-1-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-1-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-1-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-2-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-2-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-2-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-2-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-3-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-3-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-3-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-3-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-4-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-4-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-4-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-4-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-5-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-5-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-5-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-5-u8.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-6-u16.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-6-u32.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-6-u64.c: Ditto.
* gcc.target/riscv/sat/sat_u_trunc-6-u8.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
(cherry picked from commit 2b19a1ccbc03cd41038d1e166f28e271fbe88789)
Diff:
---
.../gcc.target/riscv/sat/sat_s_add-1-i16.c | 27 +-----------
.../gcc.target/riscv/sat/sat_s_add-1-i32.c | 26 +----------
.../gcc.target/riscv/sat/sat_s_add-1-i64.c | 24 +---------
.../gcc.target/riscv/sat/sat_s_add-1-i8.c | 25 +----------
.../gcc.target/riscv/sat/sat_s_add-2-i16.c | 27 +-----------
.../gcc.target/riscv/sat/sat_s_add-2-i32.c | 26 +----------
.../gcc.target/riscv/sat/sat_s_add-2-i64.c | 24 +---------
.../gcc.target/riscv/sat/sat_s_add-2-i8.c | 25 +----------
.../gcc.target/riscv/sat/sat_s_add-3-i16.c | 27 +-----------
.../gcc.target/riscv/sat/sat_s_add-3-i32.c | 26 +----------
.../gcc.target/riscv/sat/sat_s_add-3-i64.c | 24 +---------
.../gcc.target/riscv/sat/sat_s_add-3-i8.c | 25 +----------
.../gcc.target/riscv/sat/sat_s_add-4-i16.c | 27 +-----------
.../gcc.target/riscv/sat/sat_s_add-4-i32.c | 26 +----------
.../gcc.target/riscv/sat/sat_s_add-4-i64.c | 24 +---------
.../gcc.target/riscv/sat/sat_s_add-4-i8.c | 25 +----------
.../gcc.target/riscv/sat/sat_s_add_imm-1-i16.c | 51 +---------------------
.../gcc.target/riscv/sat/sat_s_add_imm-1-i32.c | 47 +-------------------
.../gcc.target/riscv/sat/sat_s_add_imm-1-i64.c | 41 +----------------
.../gcc.target/riscv/sat/sat_s_add_imm-1-i8.c | 42 +-----------------
.../gcc.target/riscv/sat/sat_s_add_imm-2-i16.c | 50 +--------------------
.../gcc.target/riscv/sat/sat_s_add_imm-2-i32.c | 47 +-------------------
.../gcc.target/riscv/sat/sat_s_add_imm-2-i64.c | 41 +----------------
.../gcc.target/riscv/sat/sat_s_add_imm-2-i8.c | 42 +-----------------
.../gcc.target/riscv/sat/sat_s_sub-1-i16.c | 25 +----------
.../gcc.target/riscv/sat/sat_s_sub-1-i32.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_sub-1-i64.c | 22 +---------
.../gcc.target/riscv/sat/sat_s_sub-1-i8.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_sub-2-i16.c | 25 +----------
.../gcc.target/riscv/sat/sat_s_sub-2-i32.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_sub-2-i64.c | 22 +---------
.../gcc.target/riscv/sat/sat_s_sub-2-i8.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_sub-3-i16.c | 25 +----------
.../gcc.target/riscv/sat/sat_s_sub-3-i32.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_sub-3-i64.c | 22 +---------
.../gcc.target/riscv/sat/sat_s_sub-3-i8.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_sub-4-i16.c | 25 +----------
.../gcc.target/riscv/sat/sat_s_sub-4-i32.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_sub-4-i64.c | 22 +---------
.../gcc.target/riscv/sat/sat_s_sub-4-i8.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-1-i32-to-i16.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-1-i64-to-i16.c | 23 +---------
.../riscv/sat/sat_s_trunc-1-i64-to-i32.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-2-i32-to-i16.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-2-i64-to-i16.c | 23 +---------
.../riscv/sat/sat_s_trunc-2-i64-to-i32.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-3-i32-to-i16.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-3-i64-to-i16.c | 23 +---------
.../riscv/sat/sat_s_trunc-3-i64-to-i32.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-4-i32-to-i16.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-4-i64-to-i16.c | 23 +---------
.../riscv/sat/sat_s_trunc-4-i64-to-i32.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-5-i32-to-i16.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-5-i64-to-i16.c | 23 +---------
.../riscv/sat/sat_s_trunc-5-i64-to-i32.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-6-i32-to-i16.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-6-i64-to-i16.c | 23 +---------
.../riscv/sat/sat_s_trunc-6-i64-to-i32.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-7-i32-to-i16.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-7-i64-to-i16.c | 23 +---------
.../riscv/sat/sat_s_trunc-7-i64-to-i32.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-8-i32-to-i16.c | 23 +---------
.../gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c | 21 +--------
.../riscv/sat/sat_s_trunc-8-i64-to-i16.c | 23 +---------
.../riscv/sat/sat_s_trunc-8-i64-to-i32.c | 21 +--------
.../gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c | 21 +--------
.../gcc.target/riscv/sat/sat_u_add-1-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add-1-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add-1-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add-1-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add-2-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add-2-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add-2-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add-2-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add-3-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add-3-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add-3-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add-3-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add-4-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add-4-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add-4-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add-4-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add-5-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add-5-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add-5-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add-5-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add-6-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add-6-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add-6-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add-6-u8.c | 14 +-----
.../riscv/sat/sat_u_add-7-u16-from-u32.c | 16 +------
.../riscv/sat/sat_u_add-7-u16-from-u64.c | 16 +------
.../riscv/sat/sat_u_add-7-u32-from-u64.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add_imm-1-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add_imm-1-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add_imm-1-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add_imm-1-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add_imm-2-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add_imm-2-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add_imm-2-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add_imm-2-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add_imm-3-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add_imm-3-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add_imm-3-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add_imm-3-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_add_imm-4-u16.c | 16 +------
.../gcc.target/riscv/sat/sat_u_add_imm-4-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_add_imm-4-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_add_imm-4-u8.c | 14 +-----
.../riscv/sat/sat_u_mul-1-u16-from-u128.c | 1 +
.../riscv/sat/sat_u_mul-1-u32-from-u128.c | 1 +
.../riscv/sat/sat_u_mul-1-u64-from-u128.c | 1 +
.../riscv/sat/sat_u_mul-1-u8-from-u128.c | 1 +
.../gcc.target/riscv/sat/sat_u_sub-1-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-1-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-1-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-1-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-10-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-10-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-10-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-10-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-11-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-11-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-11-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-11-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-12-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-12-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-12-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-12-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-2-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-2-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-2-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-2-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-3-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-3-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-3-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-3-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-4-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-4-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-4-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-4-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-5-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-5-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-5-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-5-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-6-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-6-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-6-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-6-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-7-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-7-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-7-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-7-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-8-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-8-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-8-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-8-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub-9-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub-9-u32.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub-9-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub-9-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c | 15 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c | 16 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c | 16 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c | 15 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c | 15 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c | 18 +-------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c | 18 +-------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c | 16 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c | 16 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c | 15 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c | 16 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c | 18 +-------
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c | 10 +----
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c | 15 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c | 10 +----
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c | 11 +----
.../gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c | 16 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c | 16 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c | 15 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c | 18 +-------
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c | 18 +-------
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c | 16 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c | 15 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c | 16 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c | 17 +-------
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c | 18 +-------
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c | 15 +------
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c | 13 +-----
.../gcc.target/riscv/sat/sat_u_trunc-1-u16.c | 15 +------
.../gcc.target/riscv/sat/sat_u_trunc-1-u32.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_trunc-1-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-1-u8.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-2-u16.c | 15 +------
.../gcc.target/riscv/sat/sat_u_trunc-2-u32.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-2-u64.c | 15 +------
.../gcc.target/riscv/sat/sat_u_trunc-2-u8.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-3-u16.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-3-u32.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-3-u64.c | 15 +------
.../gcc.target/riscv/sat/sat_u_trunc-3-u8.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_trunc-4-u16.c | 15 +------
.../gcc.target/riscv/sat/sat_u_trunc-4-u32.c | 14 +-----
.../gcc.target/riscv/sat/sat_u_trunc-4-u64.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-4-u8.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-5-u16.c | 15 +------
.../gcc.target/riscv/sat/sat_u_trunc-5-u32.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-5-u64.c | 15 +------
.../gcc.target/riscv/sat/sat_u_trunc-5-u8.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-6-u16.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-6-u32.c | 12 +----
.../gcc.target/riscv/sat/sat_u_trunc-6-u64.c | 15 +------
.../gcc.target/riscv/sat/sat_u_trunc-6-u8.c | 14 +-----
262 files changed, 517 insertions(+), 4101 deletions(-)
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c
index 55890d8487ce..50f0f1f06310 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i16.c
@@ -1,32 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int16_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_ADD_FMT_1(int16_t, uint16_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c
index 29e843f3c7be..dc6581736357 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i32.c
@@ -1,31 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int32_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_ADD_FMT_1(int32_t, uint32_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c
index 7f29d21d1037..9995bc7b9cf1 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i64.c
@@ -1,29 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int64_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_ADD_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c
index 3ad7bdd9164e..caf745a6f9ef 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-1-i8.c
@@ -1,30 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int8_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_ADD_FMT_1(int8_t, uint8_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c
index 07d31015c132..f19187dce498 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i16.c
@@ -1,32 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int16_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_ADD_FMT_2(int16_t, uint16_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c
index 81b85b4ab6ef..88dc37d42f74 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i32.c
@@ -1,31 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int32_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_ADD_FMT_2(int32_t, uint32_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c
index 9a3d83e8edc8..891d6cfaace6 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i64.c
@@ -1,29 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int64_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_ADD_FMT_2(int64_t, uint64_t, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c
index ecc9a0f733c4..a07172bea801 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-2-i8.c
@@ -1,30 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int8_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_ADD_FMT_2(int8_t, uint8_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c
index 7e933856e717..507719887250 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i16.c
@@ -1,32 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int16_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_ADD_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c
index 09bf497cc10a..07af4e1a75b8 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i32.c
@@ -1,31 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int32_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_ADD_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c
index 5652cdb9aea7..7c4be5b19265 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i64.c
@@ -1,29 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int64_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_ADD_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c
index 0eb0c8496496..fc0e1b7bc381 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-3-i8.c
@@ -1,30 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int8_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_ADD_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c
index 9dfdb9eba9af..4c0b38a87c39 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i16.c
@@ -1,32 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int16_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_ADD_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c
index 74df576b5319..45b4638d8dd2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i32.c
@@ -1,31 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int32_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_ADD_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c
index 5937699766f3..294eb52b290e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i64.c
@@ -1,29 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int64_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_ADD_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c
index af850d0d1558..143fa3ccd4c1 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add-4-i8.c
@@ -1,30 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_int8_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_ADD_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c
index 2e23af5d86b7..414cb6188c36 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i16.c
@@ -1,57 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_imm_int16_t_fmt_1_0:
-** addi\s+[atx][0-9]+,\s*a0,\s*-7
-** xori\s+[atx][0-9]+,\s*a0,\s*-7
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_1(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX)
-
-/*
-** sat_s_add_imm_int16_t_fmt_1_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*-1
-** not\s+[atx][0-9]+,\s*a0
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_1(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c
index e63211ffc1d3..adf5b39ad326 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i32.c
@@ -1,54 +1,11 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_imm_int32_t_fmt_1_0:
-** addi\s+[atx][0-9]+,\s*a0,\s*10
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*a0,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,a0,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_1(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX)
-/*
-** sat_s_add_imm_int32_t_fmt_1_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*-1
-** not\s+[atx][0-9]+,\s*a0
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_1(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c
index 3843b711da85..b88e064a4262 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i64.c
@@ -1,48 +1,11 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_imm_int64_t_fmt_1_0:
-** addi\s+[atx][0-9]+,\s*a0,\s*10
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*a0,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_1(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX)
-/*
-** sat_s_add_imm_int64_t_fmt_1_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*-1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** slti\s+[atx][0-9]+,\s*a0,\s*0
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_1(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c
index ceae1ea2f364..0e337efd1fa1 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-1-i8.c
@@ -1,49 +1,11 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_imm_int8_t_fmt_1_0:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*a0,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** xori\s+[atx][0-9]+,\s*a0,\s*127
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_1(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX)
-/*
-** sat_s_add_imm_int8_t_fmt_1_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*-1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*56
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srai\s+a0,\s*a0,\s*63
-** xori\s+[atx][0-9]+,\s*a0,\s*127
-** neg\s+a0,\s*a5
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_1(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
index 14c5d511aabb..f217fe1863de 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i16.c
@@ -1,57 +1,11 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_imm_int16_t_fmt_2_0:
-** addi\s+[atx][0-9]+,\s*a0,\s*-7
-** xori\s+[atx][0-9]+,\s*a0,\s*-7
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_2(0, int16_t, uint16_t, -7, INT16_MIN, INT16_MAX)
-/*
-** sat_s_add_imm_int16_t_fmt_2_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*-1
-** not\s+[atx][0-9]+,\s*a0
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_2(1, int16_t, uint16_t, -1, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c
index ecd757d903f0..4025b5ae5349 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i32.c
@@ -1,54 +1,11 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_imm_int32_t_fmt_2_0:
-** addi\s+[atx][0-9]+,\s*a0,\s*10
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*a0,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,a0,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_2(0, int32_t, uint32_t, 10, INT32_MIN, INT32_MAX)
-/*
-** sat_s_add_imm_int32_t_fmt_2_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*-1
-** not\s+[atx][0-9]+,\s*a0
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_2(1, int32_t, uint32_t, -1, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c
index 07d798f7fd00..3fc2514e6ab7 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i64.c
@@ -1,48 +1,11 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_imm_int64_t_fmt_2_0:
-** addi\s+[atx][0-9]+,\s*a0,\s*10
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srli\s+[atx][0-9]+,\s*a0,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_2(0, int64_t, uint64_t, 10, INT64_MIN, INT64_MAX)
-/*
-** sat_s_add_imm_int64_t_fmt_2_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*-1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** slti\s+[atx][0-9]+,\s*a0,\s*0
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*a0,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_2(1, int64_t, uint64_t, -1, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c
index 273421194232..a0e15cfbe4c8 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_add_imm-2-i8.c
@@ -1,49 +1,11 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_add_imm_int8_t_fmt_2_0:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*a0,\s*7
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+a0,\s*a0,\s*63
-** xori\s+[atx][0-9]+,\s*a0,\s*127
-** neg\s+a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_2(0, int8_t, uint8_t, 9, INT8_MIN, INT8_MAX)
-/*
-** sat_s_add_imm_int8_t_fmt_2_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*-1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+a0,\s*a0,\s*63
-** xori\s+[atx][0-9]+,\s*a0,\s*127
-** neg\s+a0,\s*a4
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*a0,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_ADD_IMM_FMT_2(1, int8_t, uint8_t, -1, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 2 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c
index c244eb40947e..734e8bec0362 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i16.c
@@ -1,30 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int16_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_SUB_FMT_1(int16_t, uint16_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c
index 9d8245d49979..3aa4c583c2c5 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i32.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int32_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7]
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_SUB_FMT_1(int32_t, uint32_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c
index 929de162d574..4c0caa14b96c 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i64.c
@@ -1,27 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int64_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_SUB_FMT_1(int64_t, uint64_t, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c
index a918d5ca0f44..6c1441b2e486 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-1-i8.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int8_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_SUB_FMT_1(int8_t, uint8_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c
index 2da1c0d35010..57a43276bf17 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i16.c
@@ -1,30 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int16_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_SUB_FMT_2(int16_t, uint16_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c
index 20b28e75f2d5..28582fbaa12f 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i32.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int32_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7]
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_SUB_FMT_2(int32_t, uint32_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c
index a5401983e7d9..130ca46fc550 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i64.c
@@ -1,27 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int64_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_SUB_FMT_2(int64_t, uint64_t, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c
index c54057d14c96..cd407b2f71a3 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-2-i8.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int8_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_SUB_FMT_2(int8_t, uint8_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c
index 469a11394bd8..748d61a4f209 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i16.c
@@ -1,30 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int16_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_SUB_FMT_3(int16_t, uint16_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c
index b2c03f682a29..be7869ae6330 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i32.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int32_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7]
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_SUB_FMT_3(int32_t, uint32_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c
index e3fe6c78ca6a..d16a7fbc7e86 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i64.c
@@ -1,27 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int64_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_SUB_FMT_3(int64_t, uint64_t, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c
index 150cde1bf66a..14a245442436 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-3-i8.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int8_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_SUB_FMT_3(int8_t, uint8_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c
index 26d159ca0b51..614d1ec1de12 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i16.c
@@ -1,30 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int16_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*15
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_SUB_FMT_4(int16_t, uint16_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c
index d576c38cf328..2f52bd70f291 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i32.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int32_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srliw\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-7]
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_SUB_FMT_4(int32_t, uint32_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c
index f42ffea5f9f6..cef478b2861a 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i64.c
@@ -1,27 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int64_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_S_SUB_FMT_4(int64_t, uint64_t, INT64_MIN, INT64_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c
index ee510a6340b3..3ed7790ea2ff 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_sub-4-i8.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_sub_int8_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*a1
-** xor\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*7
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_SUB_FMT_4(int8_t, uint8_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c
index 451a3754c4fc..6d1fbc4fa5a0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_1:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_1(int8_t, int16_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c
index 2aafb94cfe87..56a66990676b 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_1(int16_t, int32_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c
index 6e21ee3dbe38..10c3320b58c0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_1:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_1(int8_t, int32_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c
index 5e971e402cb0..558d704331c1 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_1(int16_t, int64_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c
index 87e5a52570cc..02bef462f1a4 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_1(int32_t, int64_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c
index 22a0dd4ad843..da04904fa6ba 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_1:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_1(int8_t, int64_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c
index cb307acd9851..41391e2eefa3 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_2:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_2(int8_t, int16_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c
index b4bee212ddc7..3e5f9e1fb64a 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_2(int16_t, int32_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c
index c467c8d49d4e..228eeab9cdf2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_2:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_2(int8_t, int32_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c
index 883b77b62b88..78542ca0c97e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_2(int16_t, int64_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c
index bb9ffcec332e..556e8ea3ea01 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_2:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_2(int32_t, int64_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c
index a54db487c38d..918a8c3b8bca 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_2:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_2(int8_t, int64_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c
index 219156c1bafe..13c0291e61bb 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_3:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_3(int8_t, int16_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c
index 87b8a70bc299..03077b722748 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_3(int16_t, int32_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c
index 7acd515b7120..e09a88d95bce 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_3:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_3(int8_t, int32_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c
index 9141f08d2f24..ca071d154416 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_3(int16_t, int64_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c
index 839a6f764b1c..4acd93ce0640 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_3(int32_t, int64_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c
index 5d13f093356c..362970cb95eb 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_3:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_3(int8_t, int64_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c
index 34dc80413624..94d9cc47783d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_4:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_4(int8_t, int16_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c
index 89c476ee2c25..51a6e7b9e083 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_4(int16_t, int32_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c
index 03ca7b7aadfc..9101b40fc840 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_4:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_4(int8_t, int32_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c
index aafe167a964a..48452e3617a8 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_4(int16_t, int64_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c
index 08e5eb3201a5..6757913b1409 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_4:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_4(int32_t, int64_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c
index b0e71fec47ab..9c6558288c6a 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_4:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_4(int8_t, int64_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c
index b42c75923bfd..f02f8665af07 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_5:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_5(int8_t, int16_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c
index 625372e22627..6753c03399f0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_5:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_5(int16_t, int32_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c
index 250e174fea56..3fd17fa817f4 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_5:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_5(int8_t, int32_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c
index 4a6ac6d2c3e5..fba761a56686 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_5:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_5(int16_t, int64_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c
index 02aa6dbde017..8872f7fd4173 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_5:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_5(int32_t, int64_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c
index ae1bcb989105..13539aa5412f 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_5:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_5(int8_t, int64_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c
index 9a740d71c67d..4aa9a8f56dfc 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_6:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_6(int8_t, int16_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c
index 1e42bfd749fa..a772ee8d081a 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_6:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_6(int16_t, int32_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c
index c3bd46dc5b4a..9c5d88b46c28 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_6:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_6(int8_t, int32_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c
index a6575f5e127e..f9f18e982eca 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_6:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_6(int16_t, int64_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c
index fd7b72e3cb8b..3658fbb32d3d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_6:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_6(int32_t, int64_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c
index 242d2d028b19..f1a7eb808ac5 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_6:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_6(int8_t, int64_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c
index 3f258b877f0c..50b06d54a307 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_7:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_7(int8_t, int16_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c
index f37a57e4cc24..12be22079c43 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_7:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_7(int16_t, int32_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c
index 4e4a7eb50edc..cb7353149335 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_7:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_7(int8_t, int32_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c
index 29b64b460081..d52394c7d35d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_7:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_7(int16_t, int64_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c
index 2bfe898f6800..cf797788cae9 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_7:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_7(int32_t, int64_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c
index 494a3147bbb8..67485a37068c 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_7:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_7(int8_t, int64_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c
index 678dec661173..a34bf4ae80f6 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int16_t_to_int8_t_fmt_8:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_8(int8_t, int16_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c
index 4acc78994755..9c25ff081a7e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int16_t_fmt_8:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_8(int16_t, int32_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c
index 34a992b4f627..9ee75e2aaee6 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int32_t_to_int8_t_fmt_8:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_8(int8_t, int32_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c
index 1919ba5431ce..8cd361e1c0a0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c
@@ -1,28 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int16_t_fmt_8:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** li\s+[atx][0-9]+,\s*-32768
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*16
-** sraiw\s+a0,\s*a0,\s*16
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_8(int16_t, int64_t, INT16_MIN, INT16_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c
index 541e55cd9836..ace064b2f5fd 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int32_t_fmt_8:
-** li\s+[atx][0-9]+,\s*-2147483648
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xor\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_8(int32_t, int64_t, INT32_MIN, INT32_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c
index 36a00857145d..e9a4d3bdbdf0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c
@@ -1,26 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_s_trunc_int64_t_to_int8_t_fmt_8:
-** slti\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** li\s+[atx][0-9]+,\s*-128
-** slt\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** srai\s+[atx][0-9]+,\s*[atx][0-9]+,\s*63
-** xori\s+[atx][0-9]+,\s*[atx][0-9]+,\s*127
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** and\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slliw\s+a0,\s*a0,\s*24
-** sraiw\s+a0,\s*a0,\s*24
-** ret
-*/
DEF_SAT_S_TRUNC_FMT_8(int8_t, int64_t, INT8_MIN, INT8_MAX)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c
index 3c916bcb9950..8f1b5c0e2d01 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint16_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_FMT_1(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c
index edded3ebc0e8..2c66eee95af3 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint32_t_fmt_1:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_FMT_1(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c
index 821e4bc5afea..28d7b7c0d356 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint64_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_FMT_1(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c
index fd73c3a5f7a7..ab183362b26a 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-1-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint8_t_fmt_1:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_FMT_1(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c
index a166d2888bb7..c03b15d38b2c 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint16_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_FMT_2(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c
index c06731b130ce..f753c014a0a5 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint32_t_fmt_2:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_FMT_2(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c
index ae10dffb53f2..cad539c02d89 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint64_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_FMT_2(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c
index f3977be6edd1..b595241629ec 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-2-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint8_t_fmt_2:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_FMT_2(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c
index 5898c3b75de7..08cd82094bbf 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint16_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_FMT_3(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c
index a1017c9c0a4d..e0b73748c304 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint32_t_fmt_3:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_FMT_3(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c
index 83fcb602a8ba..7ce0121e0c43 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint64_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_FMT_3(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c
index 2c398e0c1f77..48f61c123790 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-3-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint8_t_fmt_3:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_FMT_3(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c
index c18a5d5939ac..49d5af1e3a1a 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint16_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_FMT_4(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c
index fa2e55dc4ccd..20ad476d71da 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint32_t_fmt_4:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_FMT_4(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c
index 6818c0c2059a..6d2c9a7f0003 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint64_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_FMT_4(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c
index 1096de849f00..15e613bceff1 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-4-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint8_t_fmt_4:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_FMT_4(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c
index fd4be5c46284..225ba0c68c89 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint16_t_fmt_5:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_FMT_5(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c
index 4fbc80780c59..106baf7bb021 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint32_t_fmt_5:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_FMT_5(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c
index 5bc29487442a..48e84f63fe35 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint64_t_fmt_5:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_FMT_5(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c
index 74109c3b5042..9c0d42a652e5 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-5-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint8_t_fmt_5:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_FMT_5(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c
index 3cb9cbe7895d..0b541e0805d7 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint16_t_fmt_6:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_FMT_6(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c
index fd1cb1ae33f8..ee791566c246 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint32_t_fmt_6:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_FMT_6(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c
index c968f3358ed0..fd79139242fd 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint64_t_fmt_6:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_FMT_6(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c
index 9cd95ad6337d..f826aa402518 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-6-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint8_t_fmt_6:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_FMT_6(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
index 527f8de63517..446a951e310f 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint32_t_uint16_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_FMT_7(uint32_t, uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c
index e9031dedfd1e..626effc2cd83 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint64_t_uint16_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_FMT_7(uint64_t, uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c
index a71bd2f479a4..301463437433 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint64_t_uint32_t_fmt_7:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** add\s+[atx][0-9]+,\s*a[01],\s*a[01]
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_FMT_7(uint64_t, uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c
index 589298643fa9..541a1d8791bb 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint16_t_uint8_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_FMT_7(uint16_t, uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c
index a42a712739e4..26749a8a3ed3 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint32_t_uint8_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_FMT_7(uint32_t, uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c
index f37ef1c4543d..321f6622b6c6 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_uint64_t_uint8_t_fmt_7:
-** add\s+[atx][0-9]+,\s*a0,\s*a1
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_FMT_7(uint64_t, uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c
index 3c31ac3b650d..b6388dce16f3 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm3_uint16_t_fmt_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*3
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_1(uint16_t, 3)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c
index c6b352c21e48..cae67960785b 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm7_uint32_t_fmt_1:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*7
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_1(uint32_t, 7)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c
index 1d9df3c3045c..f9d6939f8d90 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm8_uint64_t_fmt_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*8
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_1(uint64_t, 8)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c
index 101acd88d38c..d90209a14272 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-1-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm9_uint8_t_fmt_1:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_1(uint8_t, 9)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c
index ac57cc92fe49..a34194d636ec 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm3_uint16_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*3
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_2(uint16_t, 3)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c
index 6aca60ca7096..9a801d24d901 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm7_uint32_t_fmt_2:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*7
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_2(uint32_t, 7)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c
index d0417243ff0a..2eb57a3f3d4c 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm8_uint64_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*8
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_2(uint64_t, 8)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c
index 7baeb8d603d1..363b2df8f664 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-2-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm9_uint8_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_2(uint8_t, 9)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c
index 6dbabf6f5143..aaf1209f043f 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm3_uint16_t_fmt_3:
-** addi\s+[atx][0-9]+,\s*a0,\s*3
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_3(uint16_t, 3)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c
index 1c52b219cef0..e430b37995ee 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm7u_uint32_t_fmt_3:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*7
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_3(uint32_t, 7u)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c
index ef60ce24ec82..aef5c5832f35 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm8ull_uint64_t_fmt_3:
-** addi\s+[atx][0-9]+,\s*a0,\s*8
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_3(uint64_t, 8ull)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c
index 81a4b217af62..039d982f070e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-3-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm9_uint8_t_fmt_3:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_3(uint8_t, 9)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c
index 2f6c04601f3c..baf70c3cd612 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u16.c
@@ -1,21 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm3_uint16_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*3
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*48
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_4(uint16_t, 3)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c
index 1fc9a50a8a2a..a4bfe50ba4f0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm7u_uint32_t_fmt_4:
-** slli\s+[atx][0-9]+,\s*a0,\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*7
-** slli\s+[atx][0-9]+,\s*[atx][0-9],\s*32
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_4(uint32_t, 7u)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c
index 0ca423c0f01f..f355de60d953 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm8ull_uint64_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*8
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_4(uint64_t, 8ull)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c
index c8a43fa2c5a6..54880d7f1d07 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_add_imm-4-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_add_imm9_uint8_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*9
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** neg\s+[atx][0-9]+,\s*[atx][0-9]+
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_ADD_IMM_FMT_4(uint8_t, 9)
/* { dg-final { scan-tree-dump-times ".SAT_ADD " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c
index b60c91c49488..cd6f2f8f9e9e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c
@@ -9,3 +9,4 @@
DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT)
/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c
index 1ac6f39ee923..dea9f6d83168 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c
@@ -9,3 +9,4 @@
DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT)
/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c
index af12d8267189..d8a01d1a06fa 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c
@@ -9,3 +9,4 @@
DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT)
/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c
index c73353a22ee8..dfc9d2e2abb0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c
@@ -9,3 +9,4 @@
DEF_SAT_U_MUL_FMT_1_WRAP(NT, WT)
/* { dg-final { scan-tree-dump-times ".SAT_MUL" 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c
index eb140ae4ca9d..66a439ecc028 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_1(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c
index 59ad242c9b3b..6f40907a87ae 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_1:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_1(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c
index 47a83823bf05..647fc6dc63d9 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_1(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c
index f01317ba257a..a344c58fff3e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-1-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_1:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_1(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c
index 4b7bd3a95136..87fb1fc2211b 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_10:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_10(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c
index a28213f44a55..280236a1d68f 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_10:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_10(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c
index 432da0cbddc6..4b7d339f7509 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_10:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_10(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c
index 0658d38bc844..191c3a59fbba 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-10-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_10:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_10(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c
index 2e4b875f1f92..9dc41e12b0fb 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_11:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_11(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c
index 61fb80f03203..475f94468ceb 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_11:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_11(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c
index 2a28b1f9a604..61e3584f6106 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_11:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_11(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c
index 3033844bb629..7a610556c247 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-11-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_11:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_11(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c
index 9cb86dfe7a1c..c4d21cb81019 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_12:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_12(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c
index babe768f80a1..56beb836df6a 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_12:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_12(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c
index 294ef5a15024..1bef3fe28414 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_12:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_12(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c
index 8b8f924ffba4..9004281c8431 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-12-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_12:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_12(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c
index e724752009a8..7b85582e99db 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_2(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c
index 9240406ae500..cfdf66c0d6ee 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_2(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c
index 3e1efba779cf..38988176158e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_2(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c
index 600688a75ba0..33182114a193 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-2-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_2:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_2(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c
index bb2d0b703d13..61bb5e5136fd 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_3(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c
index 06635df2393d..73bfa99a2727 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_3:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_3(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c
index ac485daea732..24d1e6958447 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_3(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c
index cdc8776d8e68..5523112f96f4 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-3-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_3:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_3(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c
index 407ff8f9787e..fb6a604164a2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_4(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c
index cb2cd057441c..0f7e2d30b44e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_4:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_4(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c
index 0ce6269bbdfa..c762647d543e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_4(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c
index 302206ae1c80..3e5d2e61a899 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-4-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_4:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_4(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c
index ce2758f473d9..ab1b375fac09 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_5:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_5(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c
index d33cef3b633d..1b8ce8451020 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_5:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_5(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c
index 1bf1e97968cc..3fc4e7acbdb8 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_5:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_5(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c
index b2ed732f2ad0..5c34ead2d109 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-5-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_5:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_5(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c
index 20614eccf0b9..70dc6ecafffa 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_6:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_6(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c
index 5d7adfdd011f..cc360362695e 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_6:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_6(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c
index b3c6f8db4589..ea633ff6f25b 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_6:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_6(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c
index a4f92a8d048e..7c4747a68a17 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-6-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_6:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_6(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c
index ebfe6739f163..cac84714fada 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_7:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_7(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c
index 98841234dd2c..18b8e5f03b9f 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_7:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_7(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c
index 67236d584e88..f5ade61c45d0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_7:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_7(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c
index 549d9d2ffa07..9b528a45b93d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-7-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_7:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_7(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c
index aa5aec7fd12d..0d093c3ac9bc 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_8:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_8(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c
index 89a8cc957f48..f04ea1d36db0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_8:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_8(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c
index a52948d3e426..17dd8f38d99b 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_8:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_8(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c
index 5606733b2ae2..b043207cddc8 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-8-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_8:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_8(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c
index 984867ae1d77..19b1a5bba714 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u16.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint16_t_fmt_9:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_FMT_9(uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c
index d1109a4ea341..a0026a1fc891 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u32.c
@@ -1,22 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint32_t_fmt_9:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** slli\s+a1,\s*a1,\s*32
-** srli\s+a1,\s*a1,\s*32
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_FMT_9(uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c
index a9acf151079d..01c155ea6e32 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint64_t_fmt_9:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*a0,\s*a1
-** addi\s+a0,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*[atx][0-9]+,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_FMT_9(uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c
index 47551fae5214..7b94d40f567b 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub-9-u8.c
@@ -1,18 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_uint8_t_fmt_9:
-** sub\s+[atx][0-9]+,\s*a0,\s*a1
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_FMT_9(uint8_t)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c
index 573ef110bf9f..475b31eb8ea9 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c
@@ -1,21 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm32768_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*32768
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 32768)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c
index 0fefbe71d026..a984f84bf824 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c
@@ -1,22 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm65533_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 65533)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c
index ad6d4f9693e3..b2930d4fa8e5 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c
@@ -1,22 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm65534_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-2
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 65534)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c
index 02dcbc5ba3a8..362cf48823d3 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c
@@ -1,21 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm1_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 1)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c
index 7346fbb2a9ae..9f17082b63ab 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c
@@ -1,21 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm6_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*6
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint16_t, 6)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c
index c7dac8ad86f1..801a86eb9e65 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c
@@ -1,23 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm2147483648_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 2147483648)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c
index 4320db3c6f6f..e04476817402 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c
@@ -1,24 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm68719476732_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 68719476732)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c
index 765d13cde645..5518064a1a11 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c
@@ -1,24 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm4294967294_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-2
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 4294967294)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c
index ca11cf14008f..a4cb49bbf800 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c
@@ -1,22 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm1_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 1)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c
index 371193002353..64808bfc33f2 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c
@@ -1,22 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm255_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*255
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint32_t, 255)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c
index 2e490f05de6d..493a14d4cf2f 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm18446744073709551614u_uint64_t_fmt_1:
-** li\s+[atx][0-9]+,\s*-2
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 18446744073709551614u)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c
index 45baa8fc32e5..4faae52395ca 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm1_uint64_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 1)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c
index a29a6e95d7af..3f993fdf6a30 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm82_uint64_t_fmt_1:
-** li\s+[atx][0-9]+,\s*82
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint64_t, 82)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c
index d1c6e942e485..a0d9235cd25f 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm128_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*128
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 128)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c
index 4c8cf90e7630..67dae03dfc00 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm253_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*253
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 253)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c
index b958f5e1582a..005453264f2b 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm254_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*254
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 254)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c
index 1951ec5d64c3..c12b5605832b 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm1_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*1
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 1)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c
index 86d0b39eb6f9..ce9f495946eb 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm11_uint8_t_fmt_1:
-** li\s+[atx][0-9]+,\s*11
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_1(uint8_t, 11)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c
index 31c1bb81969d..93d716983d85 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c
@@ -1,21 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm32768_uint16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*32768
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 32768)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c
index 68807b947cc7..8ac2ce898b58 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c
@@ -1,22 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm65533_uint16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 65533)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c
index 62deec103f6d..740d6acabf76 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c
@@ -1,18 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm1_uint16_t_fmt_2:
-** snez\s+[atx][0-9]+,\s*a0
-** subw\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 1)
/* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c
index f789feecc6c8..c82c47856489 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm6_uint16_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*-6
-** sltiu\s+a0,\s*[atx][0-9]+,\s*6
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint16_t, 6)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c
index 2f4a4395d3bf..b2f690a773a5 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c
@@ -1,23 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm2147483648_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 2147483648)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c
index dcfba62e2207..e62010b0ef5d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c
@@ -1,24 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm68719476732_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 68719476732)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c
index a3f48f7bb2fe..dd063d89d54d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c
@@ -1,16 +1,8 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm1_uint32_t_fmt_2:
-** snez\s+[atx][0-9]+,\s*a0
-** subw\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
-
DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 1)
/* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c
index 0bd8ddcdd78f..c0eb8a7b9569 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c
@@ -1,21 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm255_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*-255
-** sltiu\s+a0,\s*[atx][0-9]+,\s*255
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 255)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c
index 7b6d857a173f..ed6931373273 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c
@@ -1,16 +1,8 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm1_uint64_t_fmt_2:
-** snez\s+[atx][0-9]+,\s*a0
-** sub\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
-
DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 1)
/* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c
index c334665a1dc7..fb7db13a4712 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c
@@ -1,18 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm82_uint64_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-82
-** sltiu\s+a0,\s*[atx][0-9]+,\s*82
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 82)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c
index 26e77f0d1ac4..efe6c005bf27 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm128_uint8_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*-128
-** sltiu\s+a0,\s*[atx][0-9]+,\s*128
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 128)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c
index c5ac1b080187..126264897f47 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm253_uint8_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*-253
-** sltiu\s+a0,\s*[atx][0-9]+,\s*253
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 253)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c
index ee59b5adfb86..108daf2ffe23 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c
@@ -1,17 +1,8 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm1_uint8_t_fmt_2:
-** snez\s+[atx][0-9]+,\s*a0
-** subw\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
-
DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 1)
/* { dg-final { scan-tree-dump-not ".SAT_SUB" "optimized" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c
index 69dcc2a4a93b..784a97bef421 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm11_uint8_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*a0,\s*-11
-** sltiu\s+a0,\s*[atx][0-9]+,\s*11
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint8_t, 11)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c
index f31236253eca..0f16f9cb2ec0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c
@@ -1,22 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm32769_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*32768
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 32769)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c
index fa9a9eff1801..49daab566ce4 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c
@@ -1,22 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm65533_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 65533)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c
index b98de41711e7..30fc2bf87b0f 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c
@@ -1,21 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm6_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*6
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint16_t, 6)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c
index 79457a3b41d4..2d3c63dca52d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c
@@ -1,24 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm2147483649_uint32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*1
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 2147483649)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c
index 2e8426e1f2da..8d96c0062e43 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c
@@ -1,24 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm68719476732_uint32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 68719476732)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c
index 845218c1d2e5..c06c441bfe31 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c
@@ -1,22 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm255_uint32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*255
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint32_t, 255)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c
index ee2fbf846da7..4d2b96d5c0d3 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm82_uint64_t_fmt_3:
-** li\s+[atx][0-9]+,\s*82
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint64_t, 82)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c
index 8cc81e2253bb..8c3eb148e6d7 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm134_uint8_t_fmt_3:
-** li\s+[atx][0-9]+,\s*134
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 134)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c
index 8d8c70bf3e60..b02d832b0001 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm253_uint8_t_fmt_3:
-** li\s+[atx][0-9]+,\s*253
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 253)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c
index 348d75b82d8a..d8e0a6959d24 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm11_uint8_t_fmt_3:
-** li\s+[atx][0-9]+,\s*11
-** sub\s+[atx][0-9]+,\s*[atx][0-9]+,\s*a0
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_3(uint8_t, 11)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c
index 089c1683b041..8f3726f0b9b8 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c
@@ -1,21 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm32768_uint16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*32768
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 32768)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c
index b96e3f3da843..56c377eb1c76 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c
@@ -1,22 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm65533_uint16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-3
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 65533)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c
index 5c209bcf1062..29c6b8611041 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c
@@ -1,20 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm6_uint16_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*-6
-** sltiu\s+a0,\s*[atx][0-9]+,\s*6
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_4(uint16_t, 6)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c
index 2f4a4395d3bf..b2f690a773a5 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c
@@ -1,23 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm2147483648_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*31
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 2147483648)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c
index dcfba62e2207..e62010b0ef5d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c
@@ -1,24 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm68719476732_uint32_t_fmt_2:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** li\s+[atx][0-9]+,\s*1
-** slli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-4
-** sub\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** sltu\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint32_t, 68719476732)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c
index ee1ad9abae07..6cfb1e4ca58a 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c
@@ -1,21 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm255_uint32_t_fmt_4:
-** slli\s+a0,\s*a0,\s*32
-** srli\s+a0,\s*a0,\s*32
-** addi\s+[atx][0-9]+,\s*a0,\s*-255
-** sltiu\s+a0,\s*[atx][0-9]+,\s*255
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** sext\.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_4(uint32_t, 255)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c
index c334665a1dc7..fb7db13a4712 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c
@@ -1,18 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm82_uint64_t_fmt_2:
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-82
-** sltiu\s+a0,\s*[atx][0-9]+,\s*82
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_2(uint64_t, 82)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c
index 3fe4103a8c95..49a4150898a1 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm128_uint8_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*-128
-** sltiu\s+a0,\s*[atx][0-9]+,\s*128
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 128)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c
index 18dc5050e2b7..1022de2b7dc6 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm253_uint8_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*-253
-** sltiu\s+a0,\s*[atx][0-9]+,\s*253
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 253)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c
index 5c40f3270d16..48aaeb25d443 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c
@@ -1,19 +1,10 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_sub_imm11_uint8_t_fmt_4:
-** addi\s+[atx][0-9]+,\s*a0,\s*-11
-** sltiu\s+a0,\s*[atx][0-9]+,\s*11
-** addi\s+a0,\s*a0,\s*-1
-** and\s+a0,\s*a0,\s*[atx][0-9]+
-** andi\s+a0,\s*a0,\s*0xff
-** ret
-*/
DEF_SAT_U_SUB_IMM_FMT_4(uint8_t, 11)
/* { dg-final { scan-tree-dump-times ".SAT_SUB " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c
index b73290af8e3c..d36862160160 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u16.c
@@ -1,20 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint32_t_to_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_1(uint16_t, uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c
index 8af803ffea3f..02ca992f3102 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u32.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint32_t_fmt_1:
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_1(uint32_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c
index 1c887d4ce72d..cc01abd0c29d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint32_t_to_uint8_t_fmt_1:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c
index 6bcf64bfe616..e28ee5cec9f0 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-1-u8.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint16_t_to_uint8_t_fmt_1:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c
index 8a35e72424b0..59302cb77b17 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u16.c
@@ -1,20 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint16_t_fmt_1:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_1(uint16_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c
index a3b52de44523..735ea7e34c87 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u32.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint16_t_to_uint8_t_fmt_2:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c
index b9b43f14c0b1..8fd3f437e8b6 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u64.c
@@ -1,20 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint32_t_to_uint16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_2(uint16_t, uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c
index 7ed3623b872b..bb4ecc5cac13 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-2-u8.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint8_t_fmt_1:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_1(uint8_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c
index 7572c9e3404f..e476897f46ef 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u16.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint32_t_to_uint8_t_fmt_2:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c
index d83b5dd6caa4..524d62560bdb 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u32.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint8_t_fmt_2:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_2(uint8_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c
index b7202f971a72..ba8b2380f116 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u64.c
@@ -1,20 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint16_t_fmt_2:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_2(uint16_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c
index e90b853516ae..cba85733634b 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-3-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint32_t_fmt_2:
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_2(uint32_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c
index e8655b98db6e..58520280496a 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u16.c
@@ -1,20 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint32_t_to_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_3(uint16_t, uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c
index 41e676a14548..5d5cf973a851 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u32.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint32_t_fmt_3:
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_3(uint32_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c
index 32eeb884cbf2..866e240e9667 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u64.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint32_t_to_uint8_t_fmt_3:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c
index 5d043ce05854..f3adfb6fd48d 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-4-u8.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint16_t_to_uint8_t_fmt_3:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c
index 7e5906b5073f..4e132a9370da 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u16.c
@@ -1,20 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint16_t_fmt_3:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_3(uint16_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c
index e1b0acdba7e7..893f43e3b828 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u32.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint16_t_to_uint8_t_fmt_4:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint16_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c
index 618d50bdbe9c..5c0c7a7eaeef 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u64.c
@@ -1,20 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint32_t_to_uint16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_4(uint16_t, uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c
index c9a9a4cad6b5..395bb1bda2d3 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-5-u8.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint8_t_fmt_3:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_3(uint8_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c
index 418cdc8c4816..8f20c8ffeff7 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u16.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint32_t_to_uint8_t_fmt_4:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint32_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c
index 4903a046fde7..f7e7ff236213 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u32.c
@@ -1,17 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint8_t_fmt_4:
-** sltiu\s+[atx][0-9]+,\s*a0,\s*255
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** andi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*0xff
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_4(uint8_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c
index 6f8191c6e7c6..2d9b6a6caae8 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u64.c
@@ -1,20 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint16_t_fmt_4:
-** li\s+[atx][0-9]+,\s*65536
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** slli\s+a0,\s*a0,\s*48
-** srli\s+a0,\s*a0,\s*48
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_4(uint16_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
diff --git a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c
index 24bb846a0493..4fa81fec0580 100644
--- a/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c
+++ b/gcc/testsuite/gcc.target/riscv/sat/sat_u_trunc-6-u8.c
@@ -1,19 +1,9 @@
/* { dg-do compile } */
-/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized -fno-schedule-insns -fno-schedule-insns2" } */
-/* { dg-final { check-function-bodies "**" "" } } */
+/* { dg-options "-march=rv64gc -mabi=lp64d -fdump-tree-optimized" } */
#include "sat_arith.h"
-/*
-** sat_u_trunc_uint64_t_to_uint32_t_fmt_4:
-** li\s+[atx][0-9]+,\s*-1
-** srli\s+[atx][0-9]+,\s*[atx][0-9]+,\s*32
-** sltu\s+[atx][0-9]+,\s*a0,\s*[atx][0-9]+
-** addi\s+[atx][0-9]+,\s*[atx][0-9]+,\s*-1
-** or\s+[atx][0-9]+,\s*[atx][0-9]+,\s*[atx][0-9]+
-** sext.w\s+a0,\s*a0
-** ret
-*/
DEF_SAT_U_TRUNC_FMT_4(uint32_t, uint64_t)
/* { dg-final { scan-tree-dump-times ".SAT_TRUNC " 1 "optimized" } } */
+/* { dg-final { scan-assembler-not "\.L\[0-9\]+" } } */
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