[gcc(refs/vendors/riscv/heads/gcc-15-with-riscv-opts)] RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once

[Jeff Law]

https://gcc.gnu.org/g:64f41918ec5fb28c788fe73430ac7f718566f87b

commit 64f41918ec5fb28c788fe73430ac7f718566f87b
Author: Jin Ma <jinma@linux.alibaba.com>
Date:   Fri May 16 15:27:13 2025 +0800

    RISC-V: Since the loop increment i++ is unreachable, the loop body will never execute more than once
    
    Reported-by: huangcunjian <huangcunjian.huang@alibaba-inc.com>
    
    gcc/ChangeLog:
    
            * config/riscv/riscv.cc (riscv_gpr_save_operation_p): Remove
            break and fixbug for elt index.
    
    (cherry picked from commit 55cfd1c8fa2ad2c5d91eadd14daa35f695779a2b)

Diff:
---
 gcc/config/riscv/riscv.cc | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 3b73fbc692f9..fbe7afddfead 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -11589,11 +11589,10 @@ riscv_gpr_save_operation_p (rtx op)
 	  /* Two CLOBBER and USEs, must check the order.  */
 	  unsigned expect_code = i < 3 ? CLOBBER : USE;
 	  if (GET_CODE (elt) != expect_code
-	      || !REG_P (XEXP (elt, 1))
-	      || (REGNO (XEXP (elt, 1)) != gpr_save_reg_order[i]))
+	      || !REG_P (XEXP (elt, 0))
+	      || (REGNO (XEXP (elt, 0)) != gpr_save_reg_order[i]))
 	    return false;
 	}
-	break;
     }
   return true;
 }