[gcc(refs/users/meissner/heads/work228-float)] Add --with-powerpc-float16 and --with-powerpc-float16-disable-warning.

[Michael Meissner]

https://gcc.gnu.org/g:b53871753f2345a27a5e8027d2fab9c440893e97

commit b53871753f2345a27a5e8027d2fab9c440893e97
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Nov 13 20:59:58 2025 -0500

    Add --with-powerpc-float16 and --with-powerpc-float16-disable-warning.
    
    2025-11-13  Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * config.gcc (powerpc*-*-*): Add support for the configuration option
            --with-powerpc-float16 and --with-powerpc-float16-disable-warning.
            * config/rs6000/rs6000-call.cc (init_cumulative_args): Likewise.
            (rs6000_function_arg): Likewise.
            * config/rs6000/rs6000-cpus.def (TARGET_16BIT_FLOATING_POINT): Likewise.
            (ISA_2_7_MASKS_SERVER): Likewise.
            (POWERPC_MASKS): Likewise.

Diff:
---
 gcc/config.gcc                    | 18 ++++++++++++++++++
 gcc/config/rs6000/rs6000-call.cc  | 34 +++++++++++++++++++++++++++-------
 gcc/config/rs6000/rs6000-cpus.def | 13 ++++++++++++-
 3 files changed, 57 insertions(+), 8 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index b752bb6201bf..aa0ed7b62696 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -5819,6 +5819,24 @@ case "${target}" in
 		elif test x$with_long_double_format = xibm; then
 		    tm_defines="${tm_defines} TARGET_IEEEQUAD_DEFAULT=0"
 		fi
+
+		# Test if we should enable 16-bit floating point on the platforms
+		# where we can support __bfloat16 and _Float16.
+		if test x$with_powerpc_float16 = xyes; then
+		    tm_defines="${tm_defines} POWERPC_FLOAT16_DEFAULT=1"
+
+		elif test x$with_powerpc_16bit_floating_point = xyes; then
+		    tm_defines="${tm_defines} POWERPC_FLOAT16_DEFAULT=0"
+		fi
+
+		# Test if we should disable the warning about passing
+		# and returning 16-bit floating point values.
+		if test x$with_powerpc_float16_disable_warning = xyes; then
+		    tm_defines="${tm_defines} POWERPC_FLOAT16_DISABLE_WARNING=1"
+
+		elif test x$with_powerpc_float16_disable_warning = xno; then
+		    tm_defines="${tm_defines} POWERPC_FLOAT16_DISABLE_WARNING=0"
+		fi
 		;;
 
 	s390*-*-*)
diff --git a/gcc/config/rs6000/rs6000-call.cc b/gcc/config/rs6000/rs6000-call.cc
index 1c5bec25ecbe..4f6c8166095d 100644
--- a/gcc/config/rs6000/rs6000-call.cc
+++ b/gcc/config/rs6000/rs6000-call.cc
@@ -686,17 +686,27 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype,
 	     " to enable them", "-maltivec");
     }
 
+#if !POWERPC_FLOAT16_DISABLE_WARNING
   /* Warn that __bfloat16 and _Float16 might be returned differently in the
      future.  The issue is currently 16-bit floating point is returned in
      floating point register #1 in 16-bit format.  We may or may not want to
      return it as a scalar 64-bit value.  */
   if (fntype && warn_psabi && !cum->libcall)
     {
-      machine_mode ret_mode = TYPE_MODE (TREE_TYPE (fntype));
-      if (ret_mode == BFmode || ret_mode == HFmode)
-	warning (OPT_Wpsabi, "%s might be returned differently in the future",
-		 ret_mode == BFmode ? "__bfloat16" : "_Float16");
+      static bool warned_about_float16_return = false;
+
+      if (!warned_about_float16_return)
+	{
+	  machine_mode ret_mode = TYPE_MODE (TREE_TYPE (fntype));
+
+	  warned_about_float16_return = true;
+	  if (ret_mode == BFmode || ret_mode == HFmode)
+	    warning (OPT_Wpsabi,
+		     "%s might be returned differently in the future",
+		     ret_mode == BFmode ? "__bfloat16" : "_Float16");
+	}
     }
+#endif
 }
 
 
@@ -1655,13 +1665,23 @@ rs6000_function_arg (cumulative_args_t cum_v, const function_arg_info &arg)
       return NULL_RTX;
     }
 
+#if !POWERPC_FLOAT16_DISABLE_WARNING
   /* Warn that _Float16 and __bfloat16 might be passed differently in the
      future.  The issue is currently 16-bit floating point values are passed in
      floating point registers in the native 16-bit format.  We may or may not
      want to pass the value it as a scalar 64-bit value.  */
-  if (warn_psabi && !cum->libcall && (mode == BFmode || mode == HFmode))
-    warning (OPT_Wpsabi, "%s might be passed differently in the future",
-	     mode == BFmode ? "__bfloat16" : "_Float16");
+  if (warn_psabi && !cum->libcall && FP16_SCALAR_MODE_P (mode))
+    {
+      static bool warned_about_float16_call = false;
+
+      if (!warned_about_float16_call)
+	{
+	  warned_about_float16_call = true;
+	  warning (OPT_Wpsabi, "%s might be passed differently in the future",
+		   mode == BFmode ? "__bfloat16" : "_Float16");
+	}
+    }
+#endif
 
   /* Return a marker to indicate whether CR1 needs to set or clear the
      bit that V.4 uses to say fp args were passed in registers.
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index c03b069b779b..3e7c95da7b4a 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -43,6 +43,15 @@
 				 | OPTION_MASK_ALTIVEC			\
 				 | OPTION_MASK_VSX)
 
+/* Determine whether to enable 16-bit floating point types on power8 systems
+   and above.  */
+#if POWERPC_FLOAT16_DEFAULT
+#define TARGET_16BIT_FLOATING_POINT	OPTION_MASK_FLOAT16
+
+#else
+#define TARGET_16BIT_FLOATING_POINT	0
+#endif
+
 /* For now, don't provide an embedded version of ISA 2.07.  Do not set power8
    fusion here, instead set it in rs6000.cc if we are tuning for a power8
    system.  */
@@ -52,7 +61,8 @@
 				 | OPTION_MASK_CRYPTO			\
 				 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
 				 | OPTION_MASK_QUAD_MEMORY		\
-				 | OPTION_MASK_QUAD_MEMORY_ATOMIC)
+				 | OPTION_MASK_QUAD_MEMORY_ATOMIC	\
+				 | TARGET_16BIT_FLOATING_POINT)
 
 /* ISA masks setting fusion options.  */
 #define OTHER_FUSION_MASKS	(OPTION_MASK_P8_FUSION			\
@@ -131,6 +141,7 @@
 				 | OPTION_MASK_EFFICIENT_UNALIGNED_VSX	\
 				 | OPTION_MASK_FLOAT128_HW		\
 				 | OPTION_MASK_FLOAT128_KEYWORD		\
+				 | OPTION_MASK_FLOAT16			\
 				 | OPTION_MASK_FPRND			\
 				 | OPTION_MASK_FUTURE			\
 				 | OPTION_MASK_POWER10			\