[gcc r15-9064] arm: testsuite: fix vect-fmaxmin.c test

[Richard Earnshaw]

https://gcc.gnu.org/g:f30e180194bfbcd7594566ef050534388be31e8d

commit r15-9064-gf30e180194bfbcd7594566ef050534388be31e8d
Author: Richard Earnshaw <rearnsha@arm.com>
Date:   Mon Mar 31 10:37:11 2025 +0100

    arm: testsuite: fix vect-fmaxmin.c test
    
    This is another case of a test that was both an executable test
    requiring specific hardware and an assembler scan test.  The
    requirement for the hardware was masking some useful testing that
    could be done (by scanning the assembly output) on almost all test
    runs.  Fixed in a similar manner to fmaxmin{,-2}.c by splitting the
    test into two, one that scans the assembler output and one that
    executes the compiled code if suitable hardware is available.
    
    The masked issue was that this test was expecting vectorization to
    occur that was incorrect given the options passed.  For correct
    vectorization we need -funsafe-math-optimizations as the vector
    version of the single-precision operation will apply a truncation of
    denormal values.
    
    gcc/testsuite/ChangeLog:
    
            * gcc.target/arm/vect-fmaxmin-2.c: New compile test.  Split from ...
            * gcc.target/arm/vect-fmaxmin.c: ... here.  Remove scan-assembler
            subtests.  For both, add -funsafe-math-optimizations.

Diff:
---
 gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c | 14 ++++++++++++++
 gcc/testsuite/gcc.target/arm/vect-fmaxmin.c   | 10 +---------
 2 files changed, 15 insertions(+), 9 deletions(-)

diff --git a/gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c b/gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c
new file mode 100644
index 000000000000..57b0a3ad8019
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/vect-fmaxmin-2.c
@@ -0,0 +1,14 @@
+/* { dg-do compile } */
+/* { dg-require-effective-target arm_arch_v8a_hard_ok } */
+/* { dg-options "-O2 -ftree-vectorize -funsafe-math-optimizations -fno-inline -save-temps" } */
+/* { dg-add-options arm_arch_v8a_hard } */
+
+#include "fmaxmin.x"
+
+/* { dg-final { scan-assembler-times "vmaxnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */
+/* { dg-final { scan-assembler-times "vminnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */
+
+/* NOTE: There are no double precision vector versions of vmaxnm/vminnm.  */
+/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
+/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
+
diff --git a/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c b/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c
index ba45c4d379e7..89dc14bd594e 100644
--- a/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c
+++ b/gcc/testsuite/gcc.target/arm/vect-fmaxmin.c
@@ -1,14 +1,6 @@
 /* { dg-do run } */
 /* { dg-require-effective-target arm_v8_neon_hw } */
-/* { dg-options "-O2 -ftree-vectorize -fno-inline -march=armv8-a -save-temps" } */
+/* { dg-options "-O2 -ftree-vectorize -fno-inline -funsafe-math-optimizations" } */
 /* { dg-add-options arm_v8_neon } */
 
 #include "fmaxmin.x"
-
-/* { dg-final { scan-assembler-times "vmaxnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vminnm.f32\tq\[0-9\]+, q\[0-9\]+, q\[0-9\]+" 1 } } */
-
-/* NOTE: There are no double precision vector versions of vmaxnm/vminnm.  */
-/* { dg-final { scan-assembler-times "vmaxnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
-/* { dg-final { scan-assembler-times "vminnm.f64\td\[0-9\]+, d\[0-9\]+, d\[0-9\]+" 1 } } */
-