[gcc(refs/users/meissner/heads/work195)] Change TARGET_POPCNTB to TARGET_POWER5.

Michael Meissner meissner@gcc.gnu.org
Sun Mar 9 01:56:27 GMT 2025


https://gcc.gnu.org/g:0a7acdc2df5891a61522e2834d10967e50a23287

commit 0a7acdc2df5891a61522e2834d10967e50a23287
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Sat Mar 8 20:50:49 2025 -0500

    Change TARGET_POPCNTB to TARGET_POWER5.
    
    This patch changes TARGET_POPCNTB to TARGET_POWER5.  The -mpopcntb switch is not
    being changed in this patch, just the name of the macros used to determine if
    the PowerPC processor supports ISA 2.2 (Power5).
    
    2025-03-08  Michael Meissner  <meissner@linux.ibm.com>
    
    gcc/
    
            * gcc/config/rs6000/rs6000-builtin.cc (rs6000_builtin_is_supported):
            Change TARGET_POPCNTB to TARGET_POWER5.
            * gcc/config/rs6000/rs6000.cc (rs6000_option_override_internal):
            Likewise.
            * gcc/config/rs6000/rs6000.h (TARGET_FCFID): Likewise.
            (TARGET_POWER5): New macro.
            (TARGET_EXTRA_BUILTINS): Change TARGET_POPCNTB to TARGET_POWER5.
            (TARGET_FRE): Likewise.
            (TARGET_FRSQRTES): Likewise.
            * gcc/config/rs6000/rs6000.md (enabled attribute): Likewise.

Diff:
---
 gcc/config/rs6000/rs6000-builtin.cc |  2 +-
 gcc/config/rs6000/rs6000.cc         |  2 +-
 gcc/config/rs6000/rs6000.h          | 11 +++++++----
 gcc/config/rs6000/rs6000.md         |  2 +-
 4 files changed, 10 insertions(+), 7 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 111802381acb..4ed2bc1ca89e 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -155,7 +155,7 @@ rs6000_builtin_is_supported (enum rs6000_gen_builtins fncode)
     case ENB_ALWAYS:
       return true;
     case ENB_P5:
-      return TARGET_POPCNTB;
+      return TARGET_POWER5;
     case ENB_P6:
       return TARGET_CMPB;
     case ENB_P6_64:
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 675b039c2b65..011ba7c899ec 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -3926,7 +3926,7 @@ rs6000_option_override_internal (bool global_init_p)
     rs6000_isa_flags |= (ISA_2_5_MASKS_EMBEDDED & ~ignore_masks);
   else if (TARGET_FPRND)
     rs6000_isa_flags |= (ISA_2_4_MASKS & ~ignore_masks);
-  else if (TARGET_POPCNTB)
+  else if (TARGET_POWER5)
     rs6000_isa_flags |= (ISA_2_2_MASKS & ~ignore_masks);
   else if (TARGET_ALTIVEC)
     rs6000_isa_flags |= (OPTION_MASK_PPC_GFXOPT & ~ignore_masks);
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index a60d7a53cfaf..5ff801c8801d 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -448,7 +448,7 @@ extern int rs6000_vector_align[];
    Enable 32-bit fcfid's on any of the switches for newer ISA machines.  */
 #define TARGET_FCFID	(TARGET_POWERPC64				\
 			 || TARGET_PPC_GPOPT	/* 970/power4 */	\
-			 || TARGET_POPCNTB	/* ISA 2.02 */		\
+			 || TARGET_POWER5	/* ISA 2.02 */		\
 			 || TARGET_CMPB		/* ISA 2.05 */		\
 			 || TARGET_POPCNTD)	/* ISA 2.06 */
 
@@ -499,6 +499,9 @@ extern int rs6000_vector_align[];
 #define TARGET_MINMAX	(TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT		\
 			 && (TARGET_P9_MINMAX || !flag_trapping_math))
 
+/* Convert ISA bits like POPCNTB to PowerPC processors like POWER5.  */
+#define TARGET_POWER5		TARGET_POPCNTB
+
 /* In switching from using target_flags to using rs6000_isa_flags, the options
    machinery creates OPTION_MASK_<xxx> instead of MASK_<xxx>.  The MASK_<xxxx>
    options that have not yet been replaced by their OPTION_MASK_<xxx>
@@ -525,7 +528,7 @@ extern int rs6000_vector_align[];
 
 #define TARGET_EXTRA_BUILTINS	(TARGET_POWERPC64			 \
 				 || TARGET_PPC_GPOPT /* 970/power4 */	 \
-				 || TARGET_POPCNTB   /* ISA 2.02 */	 \
+				 || TARGET_POWER5    /* ISA 2.02 */	 \
 				 || TARGET_CMPB      /* ISA 2.05 */	 \
 				 || TARGET_POPCNTD   /* ISA 2.06 */	 \
 				 || TARGET_ALTIVEC			 \
@@ -541,9 +544,9 @@ extern int rs6000_vector_align[];
 #define TARGET_FRES	(TARGET_HARD_FLOAT && TARGET_PPC_GFXOPT)
 
 #define TARGET_FRE	(TARGET_HARD_FLOAT \
-			 && (TARGET_POPCNTB || VECTOR_UNIT_VSX_P (DFmode)))
+			 && (TARGET_POWER5 || VECTOR_UNIT_VSX_P (DFmode)))
 
-#define TARGET_FRSQRTES	(TARGET_HARD_FLOAT && TARGET_POPCNTB \
+#define TARGET_FRSQRTES	(TARGET_HARD_FLOAT && TARGET_POWER5 \
 			 && TARGET_PPC_GFXOPT)
 
 #define TARGET_FRSQRTE	(TARGET_HARD_FLOAT \
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 9c718ca2a226..c5bd273be8b3 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -379,7 +379,7 @@
      (const_int 1)
 
      (and (eq_attr "isa" "p5")
-	  (match_test "TARGET_POPCNTB"))
+	  (match_test "TARGET_POWER5"))
      (const_int 1)
 
      (and (eq_attr "isa" "p6")


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