[gcc r15-7833] PR rtl-optimization/119046: aarch64: Fix PARALLEL mode for vec_perm DUP expansion
Kyrylo Tkachov
ktkachov@gcc.gnu.org
Wed Mar 5 15:23:21 GMT 2025
https://gcc.gnu.org/g:ff505948631713d8c62523005059b10e25343617
commit r15-7833-gff505948631713d8c62523005059b10e25343617
Author: Kyrylo Tkachov <ktkachov@nvidia.com>
Date: Wed Mar 5 03:03:52 2025 -0800
PR rtl-optimization/119046: aarch64: Fix PARALLEL mode for vec_perm DUP expansion
The PARALLEL created in aarch64_evpc_dup is used to hold the lane number.
It is not appropriate for it to have a vector mode.
Other such uses use VOIDmode.
Do this here as well.
This avoids the risk of generic code treating the PARALLEL as trapping when it
has floating-point mode.
Bootstrapped and tested on aarch64-none-linux-gnu.
Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com>
PR rtl-optimization/119046
* config/aarch64/aarch64.cc (aarch64_evpc_dup): Use VOIDmode for
PARALLEL.
Diff:
---
gcc/config/aarch64/aarch64.cc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc
index af3871ce8a1f..9196b8d906c8 100644
--- a/gcc/config/aarch64/aarch64.cc
+++ b/gcc/config/aarch64/aarch64.cc
@@ -26301,7 +26301,7 @@ aarch64_evpc_dup (struct expand_vec_perm_d *d)
in0 = d->op0;
lane = GEN_INT (elt); /* The pattern corrects for big-endian. */
- rtx parallel = gen_rtx_PARALLEL (vmode, gen_rtvec (1, lane));
+ rtx parallel = gen_rtx_PARALLEL (VOIDmode, gen_rtvec (1, lane));
rtx select = gen_rtx_VEC_SELECT (GET_MODE_INNER (vmode), in0, parallel);
emit_set_insn (out, gen_rtx_VEC_DUPLICATE (vmode, select));
return true;
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