[gcc r16-1612] xtensa: Make use of DEPBITS instruction

[Max Filippov]

https://gcc.gnu.org/g:b0419798447ae25de2f58d1a695db6dadb5d8547

commit r16-1612-gb0419798447ae25de2f58d1a695db6dadb5d8547
Author: Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
Date:   Tue Jun 17 15:56:52 2025 +0900

    xtensa: Make use of DEPBITS instruction
    
    This patch implements bitfield insertion MD pattern using the DEPBITS
    machine instruction, the counterpart of the EXTUI instruction, if
    available.
    
         /* example */
         struct foo {
           unsigned int b:10;
           unsigned int r:11;
           unsigned int g:11;
         };
         void test(struct foo *p) {
           p->g >>= 1;
         }
    
         ;; result (endianness: little)
         test:
            entry   sp, 32
            l32i.n  a8, a2, 0
            extui   a9, a8, 1, 10
            depbits a8, a9, 0, 11
            s32i.n  a8, a2, 0
            retw.n
    
    gcc/ChangeLog:
    
            * config/xtensa/xtensa.h (TARGET_DEPBITS): New macro.
            * config/xtensa/xtensa.md (insvsi): New insn pattern.

Diff:
---
 gcc/config/xtensa/xtensa.h  |  1 +
 gcc/config/xtensa/xtensa.md | 21 ++++++++++++++++++++-
 2 files changed, 21 insertions(+), 1 deletion(-)

diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
index 9009db010977..a8a0565c81e7 100644
--- a/gcc/config/xtensa/xtensa.h
+++ b/gcc/config/xtensa/xtensa.h
@@ -36,6 +36,7 @@ along with GCC; see the file COPYING3.  If not see
 #define TARGET_MINMAX		XCHAL_HAVE_MINMAX
 #define TARGET_SEXT		XCHAL_HAVE_SEXT
 #define TARGET_CLAMPS		XCHAL_HAVE_CLAMPS
+#define TARGET_DEPBITS		XCHAL_HAVE_DEPBITS
 #define TARGET_BOOLEANS		XCHAL_HAVE_BOOLEANS
 #define TARGET_HARD_FLOAT	XCHAL_HAVE_FP
 #define TARGET_HARD_FLOAT_DIV	XCHAL_HAVE_FP_DIV
diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md
index 4c4270ae8bcb..029be99e3b4e 100644
--- a/gcc/config/xtensa/xtensa.md
+++ b/gcc/config/xtensa/xtensa.md
@@ -1014,7 +1014,7 @@
    (set_attr "length"	"3")])
 
 

-;; Field extract instructions.
+;; Field extract and insert instructions.
 
 (define_expand "extvsi"
   [(set (match_operand:SI 0 "register_operand" "")
@@ -1148,6 +1148,25 @@
    (set_attr "mode"	"SI")
    (set_attr "length"	"6")])
 
+(define_insn "insvsi"
+  [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+a")
+			 (match_operand:SI 1 "extui_fldsz_operand" "i")
+			 (match_operand:SI 2 "const_int_operand" "i"))
+	(match_operand:SI 3 "register_operand" "r"))]
+  "TARGET_DEPBITS"
+{
+  int shift;
+  if (BITS_BIG_ENDIAN)
+    shift = (32 - (INTVAL (operands[1]) + INTVAL (operands[2]))) & 0x1f;
+  else
+    shift = INTVAL (operands[2]) & 0x1f;
+  operands[2] = GEN_INT (shift);
+  return "depbits\t%0, %3, %2, %1";
+}
+  [(set_attr "type"	"arith")
+   (set_attr "mode"	"SI")
+   (set_attr "length"	"3")])
+
 

 ;; Conversions.