[gcc(refs/users/meissner/heads/work210-bugs)] Revert changes

[Michael Meissner]

https://gcc.gnu.org/g:050bf2f1158895c634f49418edeca69ca33ef073

commit 050bf2f1158895c634f49418edeca69ca33ef073
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Jun 3 22:08:06 2025 -0400

    Revert changes

Diff:
---
 gcc/config/rs6000/rs6000.md                 | 69 ----------------------
 gcc/testsuite/gcc.target/powerpc/pr120528.c | 90 -----------------------------
 2 files changed, 159 deletions(-)

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index dc19dc3ee1fa..0674ab922095 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -996,75 +996,6 @@
   "mtvsrdd %x0,0,%1"
   [(set_attr "type" "mtvsr")])
 
-;; On power10, optimize zero extending a QI/HI/SI/DImode value from memory that
-;; is going to a vector register target by generating a LXVR{B,H,W,D}X
-;; instruction without creating the TImode value in a GPR and using MTVSRDD to
-;; move it to the vector register.
-(define_peephole2
-  [(set (match_operand:DI 0 "int_reg_operand")
-	(match_operand:DI 1 "memory_operand"))
-   (set (match_operand:DI 2 "base_reg_operand")
-	(const_int 0))
-   (set (match_operand:TI 3 "vsx_register_operand")
-	(match_operand:TI 4 "int_reg_operand"))]
-  "TARGET_POWER10 && TARGET_POWERPC64
-   && (reg_or_subregno (operands[0])
-       == reg_or_subregno (operands[4]) + !!WORDS_BIG_ENDIAN)
-   && (reg_or_subregno (operands[2])
-       == reg_or_subregno (operands[4]) + !WORDS_BIG_ENDIAN)
-   && peep2_reg_dead_p (3, operands[4])
-   && (REG_P (XEXP (operands[1], 0))
-       || SUBREG_P (XEXP (operands[1], 0))
-       || GET_CODE (XEXP (operands[1], 0)) == PLUS)"
-  [(set (match_dup 3)
-	(zero_extend:TI (match_dup 5)))]
-{
-  rtx mem = operands[1];
-  rtx addr = XEXP (mem, 0);
-
-  if (indexed_or_indirect_address (addr, DImode))
-    operands[5] = mem;
-  else
-    {
-      rtx op2 = operands[2];
-      emit_insn (gen_rtx_SET (op2, addr));
-      operands[5] = change_address (mem, DImode, op2);
-    }
-})
-
-(define_peephole2
-  [(set (match_operand:DI 0 "int_reg_operand")
-	(zero_extend:DI
-	 (match_operand:QHSI 1 "memory_operand")))
-   (set (match_operand:DI 2 "base_reg_operand")
-	(const_int 0))
-   (set (match_operand:TI 3 "vsx_register_operand")
-	(match_operand:TI 4 "int_reg_operand"))]
-  "TARGET_POWER10 && TARGET_POWERPC64
-   && (reg_or_subregno (operands[0])
-       == reg_or_subregno (operands[4]) + !!WORDS_BIG_ENDIAN)
-   && (reg_or_subregno (operands[2])
-       == reg_or_subregno (operands[4]) + !WORDS_BIG_ENDIAN)
-   && peep2_reg_dead_p (3, operands[4])
-   && (REG_P (XEXP (operands[1], 0))
-       || SUBREG_P (XEXP (operands[1], 0))
-       || GET_CODE (XEXP (operands[1], 0)) == PLUS)"
-  [(set (match_dup 3)
-	(zero_extend:TI (match_dup 5)))]
-{
-  rtx mem = operands[1];
-  rtx addr = XEXP (mem, 0);
-
-  if (indexed_or_indirect_address (addr, DImode))
-    operands[5] = mem;
-  else
-    {
-      rtx op2 = operands[2];
-      emit_insn (gen_rtx_SET (op2, addr));
-      operands[5] = change_address (mem, DImode, op2);
-    }
-})
-
 (define_insn "zero_extendsi<mode>2"
   [(set (match_operand:EXTSI 0 "gpc_reg_operand" "=r,r,d,wa,wa,r,wa")
 	(zero_extend:EXTSI (match_operand:SI 1 "reg_or_mem_operand" "m,r,?Z,?Z,r,wa,wa")))]
diff --git a/gcc/testsuite/gcc.target/powerpc/pr120528.c b/gcc/testsuite/gcc.target/powerpc/pr120528.c
deleted file mode 100644
index f1728c0cf7f9..000000000000
--- a/gcc/testsuite/gcc.target/powerpc/pr120528.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/* { dg-do compile } */
-/* { dg-require-effective-target int128 } */
-/* { dg-require-effective-target lp64 } */
-/* { dg-options "-mdejagnu-cpu=power9 -O2" } */
-
-#include <stddef.h>
-
-#ifndef TYPE
-#define TYPE unsigned long long
-#endif
-
-void
-mem_to_vsx (TYPE *p, __uint128_t *q)
-{
-  /* lxvrdx 0,0,3
-     stxv 0,0(4)  */
-
-  __uint128_t x = *p;
-  __asm__ (" # %x0" : "+wa" (x));
-  *q = x;
-}
-
-void
-memx_to_vsx (TYPE *p, size_t n, __uint128_t *q)
-{
-  /* sldi 4,4,3
-     lxvrdx 0,3,4
-     stxv 0,0(4)  */
-
-  __uint128_t x = p[n];
-  __asm__ (" # %x0" : "+wa" (x));
-  *q = x;
-}
-
-void
-mem3_to_vsx (TYPE *p, __uint128_t *q)
-{
-  /* addi 2,3,24
-     lxvrdx 0,0,2
-     stxv 0,0(4)  */
-
-  __uint128_t x = p[3];
-  __asm__ (" # %x0" : "+wa" (x));
-  *q = x;
-}
-
-void
-mem_to_gpr (TYPE *p, __uint128_t *q)
-{
-  /* ld 2,0(3)
-     li 3,0
-     std 2,0(4)
-     std 3,8(8)  */
-
-  __uint128_t x = *p;
-  __asm__ (" # %0" : "+r" (x));
-  *q = x;
-}
-
-void
-memx_to_gpr (TYPE *p, size_t n, __uint128_t *q)
-{
-  /* sldi 4,4,3
-     ldx 2,3,4
-     li 3,0
-     std 2,0(4)
-     std 3,8(8)  */
-
-  __uint128_t x = p[n];
-  __asm__ (" # %0" : "+r" (x));
-  *q = x;
-}
-
-void
-mem3_to_gpr (TYPE *p, __uint128_t *q)
-{
-  /* ld 2,24(3)
-     li 3,0
-     std 2,0(4)
-     std 3,8(8)  */
-
-  __uint128_t x = p[3];
-  __asm__ (" # %0" : "+r" (x));
-  *q = x;
-}
-
-/* { dg-final { scan-assembler-times {\maddi\M}   1 } } */
-/* { dg-final { scan-assembler-times {\mli\M}     3 } } */
-/* { dg-final { scan-assembler-times {\mlxvrdx\M} 1 } } */
-/* { dg-final { scan-assembler-times {\mstxv\M}   3 } } */