[gcc r16-6240] aarch64: Add new target options for 2024 Architecture Extension and Armv9.6-A

[Alfie Richards]

https://gcc.gnu.org/g:cf0a68d0a3d541b3e74acc29f949fe9d9032a2f9

commit r16-6240-gcf0a68d0a3d541b3e74acc29f949fe9d9032a2f9
Author: Alfie Richards <alfie.richards@arm.com>
Date:   Wed Oct 29 13:29:10 2025 +0000

    aarch64: Add new target options for 2024 Architecture Extension and Armv9.6-A
    
    This does not add support for these version (and the corresponding
    __ARM_FEATURE_<X> macros aren't implemented for this reason) but
    accepts the command line strings and allows these to be passed on to
    the assembler.
    
    Armv9.6-A is supported by the new "armv9.6-a" option and defined as
    "armv9.5-a+cmpbr+lsui+occmo"
    
    The new extensions are:
    
    - fprcvt        (FEAT_FPRCVT)
    - lsfe          (FEAT_LSFE)
    - f8f32mm       (FEAT_F8F32MM)
    - f8f16mm       (FEAT_F8F16MM)
    - sme2p2        (FEAT_SME2p2)
    - sve2p2        (FEAT_SVE2p2)
    - sve-aes2      (FEAT_SVE_AES2)
    - sve-f16f32mm  (FEAT_SVE_F16F32MM)
    - sve-bfscale   (FEAT_SVE_BFSCALE)
    - ssve-aes      (FEAT_SSVE_AES)
    - lsui          (FEAT_LSUI)
    - occmo         (FEAT_OCCMO)
    - pcdphint      (FEAT_PCDPHINT)
    - pops          (FEAT_PoPS)
    - ssve-bitperm  (FEAT_SSVE_BitPerm)
    - ssve-fexpa    (FEAT_SSVE_FEXPA)
    - sme-mop4      (FEAT_SME_MOP4)
    - sme-tmop      (FEAT_TMOP)
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64-arches.def: Add armv9.6-a.
            * config/aarch64/aarch64-option-extensions.def:
            (sve-aes): Update to be enables by smeaes.
            (sve-bitperm): Update to be enables by smesbitperm.
            (fprcvt): New cli extension option.
            (lsfe): Likewise.
            (f8f32mm): Likewise.
            (f8f16mm): Likewise.
            (sme2p2): Likewise.
            (sve2p2): Likewise.
            (sve-aes2): Likewise.
            (sve-f16f32mm): Likewise.
            (sve-bfscale): Likewise.
            (ssve-aes): Likewise.
            (lsui): Likewise.
            (occmo): Likewise.
            (pcdphint): Likewise.
            (pops): Likewise.
            (ssve-bitperm): Likewise.
            (ssve-fexpa): Likewise.
            (sme-mop4): Likewise.
            (sme-tmop): Likewise.

Diff:
---
 gcc/config/aarch64/aarch64-arches.def            |  1 +
 gcc/config/aarch64/aarch64-option-extensions.def | 41 ++++++++++++++++++++++--
 2 files changed, 40 insertions(+), 2 deletions(-)

diff --git a/gcc/config/aarch64/aarch64-arches.def b/gcc/config/aarch64/aarch64-arches.def
index bf56fe9b4449..5ac207180b36 100644
--- a/gcc/config/aarch64/aarch64-arches.def
+++ b/gcc/config/aarch64/aarch64-arches.def
@@ -47,5 +47,6 @@ AARCH64_ARCH("armv9.2-a",     generic_armv9_a,   V9_2A,     9,  (V8_7A, V9_1A))
 AARCH64_ARCH("armv9.3-a",     generic_armv9_a,   V9_3A,     9,  (V8_8A, V9_2A))
 AARCH64_ARCH("armv9.4-a",     generic_armv9_a,   V9_4A,     9,  (V8_9A, V9_3A, SVE2p1))
 AARCH64_ARCH("armv9.5-a",     generic_armv9_a,   V9_5A,     9,  (V9_4A, CPA, FAMINMAX, LUT))
+AARCH64_ARCH("armv9.6-a",     generic_armv9_a,   V9_6A,     9,  (V9_5A, CMPBR, LSUI, OCCMO))
 
 #undef AARCH64_ARCH
diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index 48fc8d419343..61468a731c1d 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -207,13 +207,13 @@ AARCH64_FMV_FEATURE("f64mm", SVE_F64MM, (F64MM))
 
 AARCH64_OPT_FMV_EXTENSION("sve2", SVE2, (SVE), (), (), "sve2")
 
-AARCH64_OPT_EXTENSION("sve-aes", SVE_AES, (AES), (), (), "sveaes")
+AARCH64_OPT_EXTENSION("sve-aes", SVE_AES, (AES), (), (), "sveaes | smeaes")
 
 AARCH64_OPT_EXTENSION_ALIAS("sve2-aes", SVE2_AES, (SVE2, SVE_AES), (), (SVE_AES), (SVE_AES), "sveaes")
 
 AARCH64_FMV_FEATURE("sve2-aes", SVE_PMULL128, (SVE2, SVE_AES))
 
-AARCH64_OPT_EXTENSION("sve-bitperm", SVE_BITPERM, (), (), (), "svebitperm")
+AARCH64_OPT_EXTENSION("sve-bitperm", SVE_BITPERM, (), (), (), "svebitperm | smesbitperm")
 
 AARCH64_OPT_EXTENSION_ALIAS("sve2-bitperm", SVE2_BITPERM, (SVE2, SVE_BITPERM), (), (SVE_BITPERM),
 			    (SVE_BITPERM), "svebitperm")
@@ -310,6 +310,43 @@ AARCH64_OPT_EXTENSION ("sme-lutv2", SME_LUTv2, (SME2), (), (), "sme-lutv2")
 
 AARCH64_OPT_EXTENSION("cpa", CPA, (), (), (), "")
 
+AARCH64_OPT_EXTENSION("fprcvt", FPRCVT, (FP), (), (), "fprcvt")
+
+AARCH64_OPT_EXTENSION("lsfe", LSFE, (FP), (), (), "lsfe")
+
+AARCH64_OPT_EXTENSION("f8f32mm", F8F32MM, (SIMD, FP8), (), (), "f8mm8")
+
+AARCH64_OPT_EXTENSION("f8f16mm", F8F16MM, (SIMD, FP8), (), (), "f8mm4")
+
+AARCH64_OPT_EXTENSION("sme2p2", SME2p2, (SME2p1), (), (), "sme2p2")
+
+AARCH64_OPT_EXTENSION("sve2p2", SVE2p2, (SVE2p1), (), (), "sve2p2")
+
+AARCH64_OPT_EXTENSION("sve-aes2", SVE_AES2, (), (), (), "sveaes2")
+
+AARCH64_OPT_EXTENSION("sve-f16f32mm", SVE_F16F32MM, (SVE), (), (), "svef16mm")
+
+AARCH64_OPT_EXTENSION("sve-bfscale", SVE_BFSCALE, (), (), (), "svebfscale")
+
+AARCH64_OPT_EXTENSION("ssve-aes", SSVE_AES, (SME2, SVE_AES), (), (), "smeaes")
+
+AARCH64_OPT_EXTENSION("ssve-bitperm", SSVE_BITPERM, (SME2, SVE_BITPERM), (), (), "smesbitperm")
+
+AARCH64_OPT_EXTENSION("ssve-fexpa", SSVE_FEXPA, (SME2), (), (), "smesfexpa")
+
+AARCH64_OPT_EXTENSION("sme-mop4", SME_MOP4, (SME2), (), (), "smesmop4")
+
+AARCH64_OPT_EXTENSION("sme-tmop", SME_TMOP, (SME2), (), (), "smestmop")
+
+/* FEATURE_STRING not yet defined.  TODO: Update this when that value is decided.  */
+AARCH64_OPT_EXTENSION("lsui", LSUI, (), (), (), "")
+
+AARCH64_OPT_EXTENSION("occmo", OCCMO, (), (), (), "")
+
+AARCH64_OPT_EXTENSION("pcdphint", PCDPHINT, (), (), (), "")
+
+AARCH64_OPT_EXTENSION("pops", PoPS, (), (), (), "")
+
 #undef AARCH64_OPT_FMV_EXTENSION
 #undef AARCH64_OPT_EXTENSION
 #undef AARCH64_OPT_EXTENSION_ALIAS